DS26401 datasheet(114/309 Pages) DALLAS

114 / 309 page

DS26401 Octal T1/E1/J1 Framer

114

TIOCR

Transmit I/O Configuration Register

184h + (200h x n) : where n = 0 to 7, for Ports 1 to 8

Bit #

Name

TCLKINV

TSYNCINV

TSSYNCINV

TSCLKM

TSSM

TSIO

TSDW

TSM

Default

Bit 0 / TSYNC Mode Select (TSM).

Selects frame or multiframe mode for the TSYNC pin.

0 = frame mode

1 = multiframe mode

Bit 1 / TSYNC Doublewide (TSDW).

(Note: This bit must be set to zero when TSM = 1

or when TSIO = 0.)

0 = do not pulse double wide in signaling frames

1 = do pulse double wide in signaling frames

Bit 2 / TSYNC I/O Select (TSIO)

0 = TSYNC is an input

1 = TSYNC is an output

Bit 3 / TSSYNC Mode Select (TSSM).

Selects frame or multiframe mode for the TSSYNC pin.

0 = frame mode

1 = multiframe mode

Bit 4 / TSYSCLK Mode Select (TSCLKM)

0 = if TSYSCLK is 1.544MHz

1 = if TSYSCLK is 2.048/4.096/8.192/16.384MHz or IBO enabled (see Section 9.20 for details on IBO

function)

Bit 5 / TSSYNC Invert (TSSYNCINV)

0 = No inversion

1 = Invert

Bit 6 / TSYNC Invert (TSYNCINV)

0 = No inversion

1 = Invert

Bit 7 / TCLK Invert (TCLKINV)

0 = No inversion

1 = Invert

DS26401 Datasheet(PDF) 114 Page - Dallas Semiconductor

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