DS26401 datasheet(112/309 Pages) DALLAS

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DS26401 Octal T1/E1/J1 Framer

112

TCR3

Transmit Control Register 3

183h + (200h x n) : where n = 0 to 7, for Ports 1 to 8

Bit #

Name

ODF

ODM

TCSS1

TCSS0

MFRS

TFM

IBVD

TLOOP

Default

Bit 0 / Transmit Loop-Code Enable (TLOOP).

See Section 8.13 for details.

0 = transmit data normally

1 = replace normal transmitted data with repeating code as defined in registers TCD1 and TCD2

Bit 1 / Insert BPV (IBPV).

A 0-to-1 transition on this bit will cause a single BiPolar Violation (BPV) to be inserted

into the transmit data stream. Once this bit has been toggled from a 0 to a 1, the device waits for the next

occurrence of three consecutive ones to insert the BPV. This bit must be cleared and set again for a subsequent

error to be inserted.

Bit 2 / Transmit Frame Mode Select (TFM)

0 = ESF framing mode

1 = D4 framing mode

Bit 3 / Multiframe Reference Select (MFRS).

This bit selects the source for the transmit formatter multiframe

boundary.

0 = Normal Operation. Transmit multiframe boundary is determined by 'line-side' counters referenced to

TSYNC when TSYNC is an input. Free running when TSYNC is an output.

1 = Pass-Forward Operation. Tx multiframe boundary determined by 'system-side' counters referenced to

TSSYNC input, which is then 'passed forward' to the line side clock domain. This mode can only be used

when the transmit elastic store is enabled with a synchronous backplane (i.e., no frame slips allowed). This

mode must be used to allow Tx hardware signaling insertion while the Tx elastic store is enabled.

Bit 4 / Transmit Clock Source Select Bit 0 (TCSS0)

Bit 5 / Transmit Clock Source Select Bit 1 (TCSS1)

TCSS1

TCSS0

Transmit Clock Source

The TCLK pin is always the source of Transmit Clock.

Switch to the clock present at RCLK when the signal at the TCLK pin fails to

transition after 1 channel time.

For Future Use

Use the signal present at RCLK as the Transmit Clock. The TCLK pin is

ignored.

Bit 6 / Output Data Mode (ODM)

0 = pulses at TPOS and TNEG are one full TCLK period wide

1 = pulses at TPOS and TNEG are 1/2 TCLK period wide

Bit 7 / Output Data Format (ODF)

0 = bipolar data at TPOS and TNEG

1 = NRZ data at TPOS; TNEG = 0

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