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ADSP-21364SBBCZENG Datasheet(PDF) 24 Page - Analog Devices

Part # ADSP-21364SBBCZENG
Description  SHARC Processor
PDF  52 Pages
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

ADSP-21364SBBCZENG Datasheet(HTML) 24 Page - Analog Devices

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Rev. PrB
|
Page 24 of 52
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September 2004
ADSP-21364
Preliminary Technical Data
Flags
The timing specifications provided below apply to the FLAG3–0
and DAI_P20–1 pins, the parallel port and the serial peripheral
interface (SPI). See Table 3, “Pin Descriptions,” on page 11 for
more information on flag use.
Table 19. Flags
Parameter
Min
Max
Unit
Timing Requirement
tFIPW
FLAG3–0 IN Pulse Width
2 × tPCLK + 3
ns
Switching Characteristic
tFOPW
FLAG3–0 OUT Pulse Width
2 × tPCLK – 1
ns
Figure 16. Flags
DAI_P20-1
(FLAG3-0IN)
(AD15-0)
tFIPW
DAI_P20-1
(FLAG3-0OUT)
(AD15-0)
tFOPW



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