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AD9174 Datasheet(PDF) 101 Page - Analog Devices

Part # AD9174
Description  Dual, 16-Bit, 12.6 GSPS RF DAC and Direct Digital Synthesizer
PDF  164 Pages
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

AD9174 Datasheet(HTML) 101 Page - Analog Devices

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Data Sheet
AD9174
Rev. A | Page 101 of 164
Addr.
Name
Bits
Bit Name
Settings
Description
Reset
Access
0x084
SYSREF_CTRL
7
RESERVED
Reserved.
0x0
R/W
6
SYSREF_
INPUTMODE
Sets the input mode type for the SYSREF±
pins.
0x0
R/W
0
AC couple SYSREF±.
1
DC couple SYSREF±.
[5:1]
RESERVED
Reserved.
0x0
R/W
0
SYSREF_PD
Power down the SYSREF± receiver and
synchronization circuitry. If using Subclass 0,
set this bit to 1 because the SYSREF± pins
are not used.
0x0
R/W
0
SYSREF± receiver is powered on.
1
SYSREF± receiver is powered down.
0x085
NVM_CTRL1
7
RESERVED
Reserved.
0x0
R
[6:4]
NVM_CTRL1A
NVM control. Set this control to 1 at the start
of the configuration sequence (as shown
in the Start-Up Sequence section) and set
to 0 at the end of the start-up routine
when no longer programming the device.
0x1
R/W
[3:2]
RESERVED
Reserved.
0x0
R
1
NVM_CTRL1B
NVM control. Set this control to 1 at the start
of the configuration sequence (as shown in
the Start-Up Sequence section) and set to 0
at the end of the start-up routine when no
longer programming the device.
0x1
R/W
0
NVM_CTRL1C
NVM control. Set this control to 0 at the start
of the configuration sequence (as shown in
the Start-Up Sequence section) and set to 1
at the end of the start-up routine when no
longer programming the device.
0x1
R/W
0x08D
ADC_CLK_CTRL0
[7:5]
RESERVED
Reserved.
0x0
R
[4:0]
CLKOUT_SWING
Controls the swing level of the ADC clock
driver. Swing can be negative (inverts clock).
0x0
R/W
The calculation for Code 0 to Code 9 is as
follows:
ADC driver swing = 993 mV − CLKOUT_
SWING × 77 mV.
The calculation for Code 10 to Code 19 is
as follows:
ADC driver swing = (20 − CLKOUT_SWING ×
77 mV) − 1 V.
0x08F
ADC_CLK_CTRL2
[7:1]
RESERVED
Reserved.
0x0
R
0
PD_CLKOUT_
DRIVER
Powers down the CLKOUT± output driver.
0x0
R/W
0x090
DAC_POWERDOWN
[7:2]
RESERVED
Reserved.
0x0
R
1
DAC_PD1
Powers down DAC1.
0x1
R/W
0
Power up DAC1.
1
Power down DAC1.
0
DAC_PD0
Powers down DAC0.
0x1
R/W
0
Power up DAC0.
1
Power down DAC0.
0x091
ACLK_CTRL
[7:1]
RESERVED
Reserved.
0x0
R/W
0
ACLK_
POWERDOWN
Analog clock receiver power-down.
0x1
R/W



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