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AD9174 Datasheet(PDF) 109 Page - Analog Devices |
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AD9174 Datasheet(HTML) 109 Page - Analog Devices |
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109 / 164 page ![]() Data Sheet AD9174 Rev. A | Page 109 of 164 Addr. Name Bits Bit Name Settings Description Reset Access 1 DDSC_SEL_ SIDEBAND Selects upper or lower sideband from modulation result. This control is paged by the CHANNEL_PAGE bits in Register 0x008. 0x0 R/W 0 Use upper sideband. 1 Use lower sideband = spectral flip. 0 DDSC_EN_DC_ INPUT Enable test tone generation by sending dc to input level to channel DDS. Set the amplitude in the DC_TEST_INPUT_ AMPLITUDE control (Register 0x148 and Register 0x149). This control is paged by the CHANNEL_PAGE bits in Register 0x008. 0x0 R/W 0 Disable test tone generation. 1 Enable test tone generation. 0x131 DDSC_FTW_UPDATE [7:3] RESERVED Reserved. 0x0 R 2 DDSC_FTW_ LOAD_SYSREF Use next rising edge of SYSREF± to trigger FTW load and reset. This control is paged by the CHANNEL_PAGE bits in Register 0x008. 0x0 R/W 1 DDSC_FTW_ LOAD_ACK Frequency tuning word update acknow- ledge bit. This bit reads back 1 if the FTW and phase offset word is loaded properly. This control is paged by the CHANNEL_ PAGE bits in Register 0x008. 0x0 R 0 FTW is not loaded. 1 FTW is loaded. 0 DDSC_FTW_ LOAD_REQ Frequency tuning word update request from the SPI. This control is paged by the CHANNEL_PAGE bits in Register 0x008. 0x0 R/W 0 No FTW update. 1 0 to 1 transition loads the FTW. 0x132 DDSC_FTW0 [7:0] DDSC_FTW[7:0] Sets the channel datapath NCO FTW. If DDSC_MODULUS_EN is low, the main datapath NCO frequency = fDAC × (DDSC_ FTW/248). If DDSC_MODULUS_EN is high, main datapath NCO frequency = fDAC × (DDSC_FTW + DDSC_ACC_DELTA/DDSC_ ACC_MODULUS)/248. DDSC_ACC_DELTA must be > 0. DDSC_ACC_DELTA must be > DDSC_ACC_MODULUS. This control is paged by the CHANNEL_PAGE bits in Register 0x008. 0x0 R/W 0x133 DDSC_FTW1 [7:0] DDSC_FTW[15:8] Sets the channel datapath NCO FTW. If DDSC_MODULUS_EN is low, the main datapath NCO frequency = fDAC × (DDSC_ FTW/248). If DDSC_MODULUS_EN is high, main datapath NCO frequency = fDAC × (DDSC_FTW + DDSC_ACC_DELTA/DDSC_ ACC_MODULUS)/248. DDSC_ACC_DELTA must be > 0. DDSC_ACC_DELTA must be > DDSC_ACC_MODULUS. This control is paged by the CHANNEL_PAGE bits in Register 0x008. 0x0 R/W |
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