 |
Electronic Components Datasheet Search |
|
|
Electronic Components Datasheet Search |
|
AD9174 Datasheet(PDF) 112 Page - Analog Devices |
|
|
|||||||||||||||||||||||||||||
AD9174 Datasheet(HTML) 112 Page - Analog Devices |
|
|
112 / 164 page  AD9174 Data Sheet Rev. A | Page 112 of 164 Addr. Name Bits Bit Name Settings Description Reset Access 0x142 DDSC_ACC_DELTA2 [7:0] DDSC_ACC_ DELTA[23:16] Sets DDSC_ACC_DELTA. If DDSC_ MODULUS_EN is high, the main datapath NCO frequency = fDAC × (DDSC_FTW + DDSC_ACC_DELTA/DDSC_ACC_MODULUS)/ 248. DDSC_ACC_DELTA must be > 0. DDSC_ ACC_DELTA must be > DDSC_ACC_ MODULUS. This control is paged by the CHANNEL_PAGE bits in Register 0x008. 0x0 R/W 0x143 DDSC_ACC_DELTA3 [7:0] DDSC_ACC_ DELTA[31:24] Sets DDSC_ACC_DELTA. If DDSC_ MODULUS_EN is high, the main datapath NCO frequency = fDAC × (DDSC_FTW + DDSC_ACC_DELTA/DDSC_ACC_MODULUS)/ 248. DDSC_ACC_DELTA must be > 0. DDSC_ ACC_DELTA must be > DDSC_ACC_ MODULUS. This control is paged by the CHANNEL_PAGE bits in Register 0x008. 0x0 R/W 0x144 DDSC_ACC_DELTA4 [7:0] DDSC_ACC_ DELTA[39:32] Sets DDSC_ACC_DELTA. If DDSC_ MODULUS_EN is high, the main datapath NCO frequency = fDAC × (DDSC_FTW + DDSC_ACC_DELTA/DDSC_ACC_MODULUS)/ 248. DDSC_ACC_DELTA must be > 0. DDSC_ ACC_DELTA must be > DDSC_ACC_ MODULUS. This control is paged by the CHANNEL_PAGE bits in Register 0x008. 0x0 R/W 0x145 DDSC_ACC_DELTA5 [7:0] DDSC_ACC_ DELTA[47:40] Sets DDSC_ACC_DELTA. If DDSC_ MODULUS_EN is high, the main datapath NCO frequency = fDAC × (DDSC_FTW + DDSC_ACC_DELTA/DDSC_ACC_MODULUS)/ 248. DDSC_ACC_DELTA must be > 0. DDSC_ ACC_DELTA must be > DDSC_ACC_ MODULUS. This control is paged by the CHANNEL_PAGE bits in Register 0x008. 0x0 R/W 0x146 CHNL_GAIN0 [7:0] CHNL_GAIN[7:0] Sets the scalar channel gain value. This control is paged by the CHANNEL_PAGE bits in Register 0x008. Channel gain = CHNL_GAIN/211. 0x0 R/W 0x147 CHNL_GAIN1 [7:4] RESERVED Reserved. 0x0 R [3:0] CHNL_GAIN[11:8] Sets the scalar channel gain value. This control is paged by the CHANNEL_PAGE bits in Register 0x008. Channel gain = CHNL_GAIN/211. 0x8 R/W 0x148 DC_CAL_TONE0 [7:0] DC_TEST_INPUT_ AMPLITUDE[7:0] DC test tone amplitude. This value sets the I path and Q paths amplitudes independently. Set these bits to 0x50FF for a full-scale tone and ensure DDSC_EN_DC_INPUT in Register 0x130 Bit 0 is set to 1. This control is paged by the CHANNEL_PAGE control in Register 0x008. 0x0 R/W 0x149 DC_CAL_TONE1 [7:0] DC_TEST_INPUT_ AMPLITUDE[15:8] DC test tone amplitude. This value sets the I path and Q paths amplitudes independently. Set to 0x50FF for a full-scale tone and ensure that DDSC_EN_DC_INPUT (Register 0x130, Bit 0) is set to 1. This control is paged by the CHANNEL_PAGE bits in Register 0x008. 0x0 R/W |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
English ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
