AD9174 datasheet(113/164 Pages) AD

113 / 164 page

Data Sheet

AD9174

Rev. A | Page 113 of 164

Addr.

Name

Bits

Bit Name

Settings

Description

Reset

Access

0x14B

PRBS

PRBS_GOOD_Q

DAC1 good data indicator.

0x0

Correct PRBS sequence detected.

Incorrect sequence detected. Sticky; reset

to 1 by PRBS_RESET.

PRBS_GOOD_I

DAC0 good data indicator.

0x0

Incorrect sequence detected. Sticky; reset

to 1 by PRBS_RESET.

Correct PRBS sequence detected.

RESERVED

Reserved.

0x0

PRBS_INV_Q

DAC1 data inversion.

0x1

R/W

Expect normal data.

Expect inverted data.

PRBS_INV_I

DAC0 data inversion.

0x0

R/W

Expect normal data.

Expect inverted data.

PRBS_MODE

Select which PRBS polynomial is used for

the datapath PRBS test.

0x0

R/W

7-bit: x7 + x6 + 1.

15-bit: x15 + x14 + 1.

PRBS_RESET

Reset error counters.

0x0

R/W

Normal operation.

Reset counters.

PRBS_EN

Enable PRBS checker.

0x0

R/W

Disable.

Enable.

0x14C

PRBS_ERROR_I

[7:0]

PRBS_COUNT_I

DAC0 PRBS error count.

0x0

0x14D

PRBS_ERROR_Q

[7:0]

PRBS_COUNT_Q

DAC1 PRBS error count.

0x0

0x14E

PRBS_CHANSEL

[7:3]

RESERVED

Reserved.

0x0

[2:0]

PRBS_CHANSEL

Selects the channel to which the PRBS_

GOOD_x and PRBS_COUNT_x bit field

readbacks correspond.

0x7

R/W

Select Channel 0 for PRBS_COUNT_x and

PRBS_GOOD_x (Channel 0, DAC0).

Select Channel 1 for PRBS_COUNT_x and

PRBS_GOOD_x (Channel 1, DAC0).

Select Channel 2 for PRBS_COUNT_x and

PRBS_GOOD_x (Channel 2, DAC0).

Select Channel 3 for PRBS_COUNT_x and

PRBS_GOOD_x (Channel 0, DAC1).

Select Channel 4 for PRBS_COUNT_x and

PRBS_GOOD_x (Channel 1, DAC1).

Select Channel 5 for PRBS_COUNT_x and

PRBS_GOOD_x (Channel 2, DAC1).

OR all channels for PRBS_GOOD_x, sum all

channels for PRBS_COUNT_x.

0x151

DECODE_MODE

[7:5]

RESERVED

Reserved.

0x0

MSB_SHUFFLE_EN

MSB shuffle control. Set =1 to enable

shuffling the MSBs, or set = 0 to disable

MSB shuffle and use the default (static)

thermometer encoding instead.

0x0

R/W

[3:0]

RESERVED

Reserved.

0x0

0x1DE

SPI_ENABLE

[7:2]

RESERVED

Reserved.

0x0

SPI_EN1

Enable SPI control.

0x1

R/W

SPI_EN0

Enable SPI control.

0x1

R/W

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