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MCS11 Datasheet(PDF) 41 Page - PADAUK Technology. |
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MCS11 Datasheet(HTML) 41 Page - PADAUK Technology. |
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41 / 108 page  MCS11 ADC-Type Enhanced FPPA TM Controller ©Copyright 2018, PADAUK Technology Co. Ltd Page 41 of 108 PDK-DS-MCS11_v020 – Apr. 20, 2018 5-11. Interrupt There are eight interrupt lines for MCS11: four external interrupt lines (PA0 or PA5, PB0 or PB7, the edge type is specified by integsr register), Timer16 interrupt, Timer2 interrupt, hall comparator interrupt, PWM generator interrupt and ADC interrupt, every interrupt request line has its own corresponding interrupt control bit to enable or disable it, the hardware diagram of interrupt function is shown as Fig. 5-11-1. All the interrupt request flags are set by hardware and cleared by software. All the interrupt request lines are also controlled by engint command (enable global interrupt) to enable interrupt operation and disgint command (disable global interrupt) to disable it. Only FPP0 can accept the interrupt request, other FPP unit will not be interfered by interrupt. The stack memory for interrupt is shared with data memory and its address is specified by stack register sp. Since the program counter is 16 bits width, the bit 0 of stack register sp should be kept 0. Moreover, user can use pushaf / popaf instructions to store or restore the values of ACC and flag register to / from stack memory. Since the stack memory is shared with data memory, user should manipulate the memory using carefully. By adjusting the memory location of stack point, the depth of stack pointer for every FPP unit could be fully specified by user to achieve maximum flexibility of system. Fig. 5-11-1 Hardware diagram of interrupt controller Inten.6 Inten.5 Inten.3 Inten.2 Inten.1 Inten.0 engint / disgint Note: “engint” and “disgint” are instructions Interrupt to FPP0 Detect both edge detect both edge detect rising edge detect event detect event detect event Intrq.0 Intrq.1 Intrq.2 Intrq.3 Intrq.5 Intrq.6 PA0 PB0 T16 output ADC output PWMG output Timer2 output M U X M U X PA5 PB7 rop.0 rop.1 Inten.4 Intrq.4 detect event Hall comparator Inten.6 Inten.5 Inten.3 Inten.2 Inten.1 Inten.0 engint / disgint Note: “engint” and “disgint” are instructions Interrupt to FPP0 Detect both edge detect both edge detect rising edge detect event detect event detect event Intrq.0 Intrq.1 Intrq.2 Intrq.3 Intrq.5 Intrq.6 PA0 PB0 T16 output ADC output PWMG output Timer2 output M U X M U X PA5 PB7 rop.0 rop.1 Inten.4 Intrq.4 detect event Hall comparator |
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