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MCS11 Datasheet(PDF) 9 Page - PADAUK Technology. |
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MCS11 Datasheet(HTML) 9 Page - PADAUK Technology. |
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9 / 108 page  MCS11 ADC-Type Enhanced FPPA TM Controller ©Copyright 2018, PADAUK Technology Co. Ltd Page 9 of 108 PDK-DS-MCS11_v020 – Apr. 20, 2018 2. General Description and Block Diagram The MCS11 is an ADC-Type of PADAUK’s parallel processing, fully static, OTP-based CMOS 8x8 bit processor array that can execute eight peripheral functions in parallel. It employs RISC architecture based on patent pending FPPA™ (Field Programmable Processor Array) technology and all the instructions are executed in one cycle except that some instructions are two cycles that handle indirect memory access. 4Kx16 bits OTP user program memory and 208 bytes data SRAM are inside for 8 FPP units using, one up to 11 channels 10-bit ADC is built inside the chip with one channel for internal band-gap reference voltage; one general purpose comparator and one hall comparator are provided. There are two hardware timers are also provided: one is 16-bit timer and one is 8-bit timer with PWM generation. One hardware Pulse Capture, 10-bit hardware PWM generator and two PWM protection modules are also built inside the MCS11 in order to provide the best solution for BLDC controller. 4KW OTP & Task Control FPP3 FPP4 PWM Function I2C Function SPI Function UART Function Key Scan Function LCD Function Pulse Capture Watchdog Timer 208 bytes SRAM 8-bit Timer 16-bit Timer Interrupt Controller 10-bit ADC Power management FPP5 FPP6 FPP2 FPP1 FPP0 FPP7 IO Ports 11-bit PWM generator Hall Comparator Multiplier General Purpose Comparator POR / LVD 4KW OTP & Task Control FPP3 FPP4 PWM Function I2C Function SPI Function UART Function Key Scan Function LCD Function Pulse Capture Watchdog Timer 208 bytes SRAM 8-bit Timer 16-bit Timer Interrupt Controller 10-bit ADC Power management FPP5 FPP6 FPP2 FPP1 FPP0 FPP7 IO Ports 11-bit PWM generator Hall Comparator Multiplier General Purpose Comparator POR / LVD |
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