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CEC1712 Datasheet(PDF) 159 Page - Microchip Technology |
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CEC1712 Datasheet(HTML) 159 Page - Microchip Technology |
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159 / 338 page ![]() 2020-2021 Microchip Technology Inc. DS00003416C-page 159 CEC1712 13.7 Low Power Modes The Basic Timer may be put into a low power state by the chip’s Power, Clocks, and Reset (PCR) circuitry. This block is only be permitted to enter low power modes when the block is not active. The sleep state of this timer is as follows: • Asleep while the block is not Enabled • Asleep while the block is not running (start inactive). • Asleep while the block is halted (even if running). The block is active while start is active. 13.8 Description This timer block offers a simple mechanism for firmware to maintain a time base in the design. The timer may be enabled to execute the following features: • Programmable resolution per LSB of the counter via the Pre-scale bits in the Timer Control Register • Programmable as either an up or down counter • One-shot or Continuous Modes • In one-shot mode the Auto Restart feature stops the counter when it reaches its limit and generates a level event. • In Continuous Mode the Auto Restart feature restarts that counter from the programmed preload value and gener- ates a pulse event. • Counter may be reloaded, halted, or started via the Timer Control register • Block may be reset by either a Power On Reset (POR) or via a Soft Reset. FIGURE 13-2: BLOCK DIAGRAM Host Interface 16/32 Bit Basic Timer REGS Timer Logic Pre-Scaler 48MHz |
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