CEC1712 datasheet(162/338 Pages) MICROCHIP

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CEC1712

DS00003416C-page 162

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13.9.5

TIMER CONTROL REGISTER

Offset

10h

Bits

Description

Type

Default

Reset

Event

31:16 PRE_SCALE

This is used to divide down the system clock through clock enables

to lower the power consumption of the block and allow slow timers.

Updating this value during operation may result in erroneous clock

enable pulses until the clock divider restarts.

The number of clocks per clock enable pulse is (Value + 1); a setting

of 0 runs at the full clock speed, while a setting of 1 runs at half

speed.

R/W

Tim-

er_Reset

15:8 Reserved

RES

7HALT

This is a halt bit. This will halt the timer as long as it is active. Once

the halt is inactive, the timer will start from where it left off.

1=Timer is halted. It stops counting. The clock divider will also be

reset.

0=Timer runs normally

R/W

Tim-

er_Reset

6RELOAD

This bit reloads the counter without interrupting it operation. This will

not function if the timer has already completed (when the START bit

in this register is ‘0’). This is used to periodically prevent the timer

from firing when an event occurs. Usage while the timer is off may

result in erroneous behavior.

R/W

Tim-

er_Reset

5START

This bit triggers the timer counter. The counter will operate until it

hits its terminating condition. This will clear this bit. It should be

noted that when operating in restart mode, there is no terminating

condition for the counter, so this bit will never clear. Clearing this bit

will halt the timer counter.

Setting this bit will:

• Reset the clock divider counter.

• Enable the clock divider counter.

• Start the timer counter.

• Clear all interrupts.

Clearing this bit will:

• Disable the clock divider counter.

• Stop the timer counter.

R/W

Tim-

er_Reset

4 SOFT_RESET

This is a soft reset.

This is self clearing 1 cycle after it is written.

Tim-

er_Reset

3 AUTO_RESTART

This will select the action taken upon completing a count.

1=The counter will automatically restart the count, using the contents

of the Timer Preload Register to load the Timer Count Register

The interrupt will be set in edge mode

0=The counter will simply enter a done state and wait for further con-

trol inputs. The interrupt will be set in level mode.

R/W

Tim-

er_Reset

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