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LMK04832PAP/EM Datasheet(PDF) 53 Page - Texas Instruments |
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LMK04832PAP/EM Datasheet(HTML) 53 Page - Texas Instruments |
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53 / 102 page  8.6.2.3.2 SYSREF_REQ_EN, SYNC_BYPASS, SYSREF_MUX This register sets the source for the SYSREF outputs. Refer to Figure 8-3 and SYNC/SYSREF. Table 8-29. Register 0x139 BIT NAME POR DEFAULT DESCRIPTION 7:6 NA 0 Reserved 5 NA 0 Reserved 4 SYSREF_REQ_EN 0 Enables the SYNC/SYSREF_REQ pin to force the SYSREF_MUX = 3 for continuous pulses. When using this feature enable pulser and set SYSREF_MUX = 2 (Pulser). 3 SYNC_BYPASS 0 Bypass SYNC polarity invert and other circuitry. 0: Normal 1: SYNC signal is bypassed 2 NA 0 Reserved 1:0 SYSREF_MUX 0 Selects the SYSREF source. Field Value SYSREF Source 0 (0x00) Normal SYNC 1 (0x01) Re-clocked 2 (0x02) SYSREF Pulser 3 (0x03) SYSREF Continuous www.ti.com LMK04832-SEP SNAS838A – OCTOBER 2022 – REVISED NOVEMBER 2022 Copyright © 2022 Texas Instruments Incorporated Submit Document Feedback 53 Product Folder Links: LMK04832-SEP |
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