LMK04832PAPSLASHEM datasheet(65/102 Pages) TI

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8.6.2.6 (0x14B - 0x152) Holdover

8.6.2.6.1 LOS_TIMEOUT, LOS_EN, TRACK_EN, HOLDOVER_FORCE, MAN_DAC_EN, MAN_DAC[9:8]

This register contains the holdover functions.

Table 8-47. Register 0x14B

BIT

NAME

POR DEFAULT

DESCRIPTION

7:6

LOS_TIMEOUT

This controls the amount of time in which no activity on a CLKin forces a clock

switch event.

Field Value

Timeout

0 (0x00)

5 MHz typical

1 (0x01)

25 MHz typical

2 (0x02)

100 MHz typical

3 (0x03)

200 MHz typical

LOS_EN

Enables the LOS (Loss-of-Signal) timeout control. Valid for MOS clock inputs.

0: Disabled

1: Enabled

TRACK_EN

Enable the DAC to track the PLL1 tuning voltage, optionally for use in holdover

mode. After device reset, tracking starts at DAC code = 512.

Tracking can be used to monitor PLL1 voltage in any mode.

0: Disabled

1: Enabled, will only track when PLL1 is locked.

HOLDOVER

_FORCE

This bit forces holdover mode. When holdover mode is forced, if

MAN_DAC_EN = 1, then the DAC will set the programmed MAN_DAC value.

Otherwise, the tracked DAC value will set the DAC voltage.

0: Disabled

1: Enabled.

MAN_DAC_EN

This bit enables the manual DAC mode.

0: Automatic

1: Manual

1:0

MAN_DAC[9:8]

See MAN_DAC for more information on the MAN_DAC settings.

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LMK04832-SEP

SNAS838A – OCTOBER 2022 – REVISED NOVEMBER 2022

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LMK04832PAP/EM Datasheet(PDF) 65 Page - Texas Instruments

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