LMK04832PAPSLASHEM datasheet(6/102 Pages) TI

6 / 102 page

6 Specifications

6.1 Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted)(1)

SYMBOL

PARAMETER

MIN

MAX

UNIT

VDD, VDD_A

Power supply voltage

–0.3

3.6

VIN

Input voltage

–0.3

VDD + 0.3

IIN

Differential input current (CLKIN_P/N,

OSCIN_P/N,FIN0_P/N,FIN1_P/N

Junction Temperature

150

°C

Tstg

Storage temperature

–65

150

°C

(1)

Operation outside the Absolute Maximum Ratings may cause permanent device damage. Absolute Maximum Ratings do not imply

functional operation of the device at these or any other conditions beyond those listed under Recommended Operating Conditions.

If used outside the Recommended Operating Conditions but within the Absolute Maximum Ratings, the device may not be fully

functional, and this may affect device reliability, functionality, performance, and shorten the device lifetime.

6.2 ESD Ratings

SYMBOL

PARAMETER

CONDITION

VALUE

UNIT

V(ESD)

Electrostatic discharge

Human body model (HBM), per ANSI/ESDA/JEDEC JS-001,

all pins(1)

±2000

Charged device model (CDM), per ANSI/ESDA/JEDEC

JS-002, all pins(2)

±250

(1)

JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.

(2)

JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.

6.3 Recommended Operating Conditions

over case temperature range (unless otherwise noted)

SYMBOL

PARAMETER

MIN

NOM

MAX

UNIT

VDD

IO supply voltage

3.135

3.3

3.465

VDD_A

Core supply voltage

3.135

3.3

3.465

Ambient Temperature

–55

125

°C

6.4 Thermal Information

SYMBOL

THERMAL METRIC(1)

PAP (HTQFP)

UNIT

64 PINS

RθJA

Junction-to-ambient thermal resistance

21.3

°C/W

RθJC(top)

Junction-to-case (top) thermal resistance

8.3

°C/W

RθJB

Junction-to-board thermal resistance

6.9

°C/W

ΨJT

Junction-to-top characterization parameter

0.1

°C/W

ΨJB

Junction-to-board characterization parameter

6.8

°C/W

RθJC(bot)

Junction-to-case (bottom) thermal resistance

0.5

°C/W

(1)

For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application

report.

LMK04832-SEP

SNAS838A – OCTOBER 2022 – REVISED NOVEMBER 2022

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LMK04832PAP/EM Datasheet(PDF) 6 Page - Texas Instruments

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