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LMK04832PAP/EM Datasheet(PDF) 76 Page - Texas Instruments

Part # LMK04832PAP/EM
Description  LMK04832-SEP Space Grade Ultra-Low-Noise JESD204B/C Dual-Loop Clock Jitter Cleaner
PDF  102 Pages
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

LMK04832PAP/EM Datasheet(HTML) 76 Page - Texas Instruments

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8.6.2.8.2 PLL2_P, OSCin_FREQ, PLL2_REF_2X_EN
This register sets other PLL2 functions.
Table 8-70. Register 0x162
BIT
NAME
POR DEFAULT
DESCRIPTION
7:5
PLL2_P
2
The PLL2 N Prescaler divides the output of the VCO as selected by
Mode_MUX1 and is connected to the PLL2 N divider.
Field Value
Value
0 (0x00)
8
1 (0x01)
2
2 (0x02)
2
3 (0x03)
3
4 (0x04)
4
5 (0x05)
5
6 (0x06)
6
7 (0x07)
7
4:2
OSCin_FREQ
3
The frequency of the PLL2 reference input to the PLL2 Phase Detector
(OSCIN_P/OSCIN_N pins) must be programmed to support proper operation
of the frequency calibration routine which locks the internal VCO to the target
frequency.
Field Value
OSCIN Frequency
0 (0x00)
0 to 63 MHz
1 (0x01)
>63 MHz to 127 MHz
2 (0x02)
>127 MHz to 255 MHz
3 (0x03)
Reserved
4 (0x04)
>255 MHz to 500 MHz
5 (0x05) to 7(0x07)
Reserved
1
NA
0
Reserved
0
PLL2_REF_2X_EN
1
Enabling the PLL2 reference frequency doubler allows for higher phase
detector frequencies on PLL2 than would normally be allowed with the given
VCXO frequency.
Higher phase detector frequencies reduces the PLL2 N values which makes
the design of wider loop bandwidth filters possible.
0: Doubler Disabled
1: Doubler Enabled
LMK04832-SEP
SNAS838A – OCTOBER 2022 – REVISED NOVEMBER 2022
www.ti.com
76
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Product Folder Links: LMK04832-SEP



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