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LMK04832PAP/EM Datasheet(PDF) 90 Page - Texas Instruments

Part # LMK04832PAP/EM
Description  LMK04832-SEP Space Grade Ultra-Low-Noise JESD204B/C Dual-Loop Clock Jitter Cleaner
PDF  102 Pages
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

LMK04832PAP/EM Datasheet(HTML) 90 Page - Texas Instruments

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• CML and LVPECL are chosen for the 983.04 and 2949.12 MHz clocks for the lower noise floor
• CMOS is chosen for the 122.88 MHz clock for lower current consumption
Programming
• Using the clock design tools configuration the TICS Pro software is manually updated with this information to
meet the required application.
• For best performance the input and output drive level bits may be set. Best noise floor performance is
achieved with CLKout2_3_IDL = 1 and CLKout2_3_ODL = 1.
• The CLKoutX_Y_ODL bit has no impact on even clock outputs in high performance bypass mode.
9.2.3 Application Curve
Offset (Hz)
1x102
1x103
1x104
1x105
1x106
1x107
1x108
-170
-165
-160
-155
-150
-145
-140
-135
-130
-125
-120
-115
-110
-105
-100
-95
-90
-85
-80
OSCOUT
CLKOUT8
CLKOUT0
CLKOUT2
CLKOUT4
Figure 9-7. Offset vs Phase Noise
Table 9-5. Offset vs Phase Noise
Output
Frequency
(MHz)
Format
Jitter
(fs)
Phase Noise (dBc/Hz)
100 Hz
1 kHz
10 kHz
100 kHz
1 MHz
10 MHz
Floor
OSCOUT
122.88
LVCMOS
132.2
-111.8
-137.3
-148.3
-154.0
-155.4
-155.9
-156.0
CLKOUT8
122.88
HSDS
(8 mA)
87.7
-111.7
-134.7
-144.4
-146.4
-157.2
-162.7
-162.8
CLKOUT0
245.76
LVPECL
(2 Vpp)
70.0
-98.0
-127.6
-137.2
-139.1
-154.1
-161.9
-162.6
CLKOUT2
983.04
LVPECL
(1.6 Vpp)
67.1
-92.7
-115.9
-125.7
-128.2
-141.4
-157.4
-159.4
CLKOUT4
2949.12
CML
(32 mA)
65.4
-81.4
-106.5
-116.3
-118.8
-132.0
-154.7
-158.0
LMK04832-SEP
SNAS838A – OCTOBER 2022 – REVISED NOVEMBER 2022
www.ti.com
90
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Product Folder Links: LMK04832-SEP



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