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LMK04832PAP/EM Datasheet(PDF) 84 Page - Texas Instruments

Part # LMK04832PAP/EM
Description  LMK04832-SEP Space Grade Ultra-Low-Noise JESD204B/C Dual-Loop Clock Jitter Cleaner
PDF  102 Pages
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

LMK04832PAP/EM Datasheet(HTML) 84 Page - Texas Instruments

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9 Application and Implementation
Note
Information in the following applications sections is not part of the TI component specification,
and TI does not warrant its accuracy or completeness. TI’s customers are responsible for
determining suitability of components for their purposes, as well as validating and testing their design
implementation to confirm system functionality.
9.1 Application Information
Texas Instruments provides the TICSPRO software to assist with device setup, frequency divider calculations,
and general device programming as well as the PLLatinum™ simulation software for loop filter design and phase
noise/jitter simulation on ti.com.
9.1.1 Treatment of Unused Pins
Not all pins are needed for every application. In general, power down the unused feature in software. The
unused pin may be left floating or grounded through a 1-kΩ resistor.
Table 9-1. Treatment of Unused Pins
PINS
TREATMENT IF UNUSED
CLKOUTx_P/CLKOUTx_N
1 kΩ to GND or float pin
RESET/GPO
1 kΩ to GND or float pin
SYNC/SYSREF_REQ
1 kΩ to GND or float pin
FIN0_P/FIN0_N
1 kΩ to GND or float pin
STATUS_LD1,STATUS_LD2
1 kΩ to GND or float pin
CPOUT1,CPOUT2
1 kΩ to GND or float pin
OSCOUT_P/CLKIN2_P
1 kΩ to GND or float pin
OSCOUT_N/CLKIN2_N
1 kΩ to GND or float pin
9.1.2 Frequency Planning and Spur Minimization
Frequency planning refers to strategically assigning frequencies to outputs for the purposes of spur minimization.
Spurs vary as a function of output frequency, output format, and output assignments. Spurs can be directly
coupling from one output to the next or be caused by a mixing product. For instance, if one output is at 3 GHz
and another output is at 750 MHz, one can see a 750 MHz-spur coupling through the 3-GHz output. In some
situations, it is also possible to have a spur that occurs at the greatest common divisor of the two frequencies
(250 MHz in this case). In either case, the choice of which outputs the 3-GHz and 750-MHz frequencies are
assigned to can have an impact on spurs.
Table 9-2. Factors Impacting Spurs
Factor
General Guidelines and Tips
Output Frequency
To a point, higher frequencies tend to couple stronger to other outputs, but bypassing impacts this.
Output Format
Stronger signals and single-ended signals tend to couple stronger to other outputs. LVDS tends to couple
less than LVPECL as well. For LVCMOS, consider using both sides of the output with one side inverted to
the other (Norm/Inv) to minimize crosstalk.
Frequency Assignment to
Output
(Frequency Planning)
Outputs that are physically closer and that share the same power supply tend to have stronger crosstalk.
Outputs are grouped by supply in the following manner: Clock Group 0: (CLK0,CLK1,CLK12,CLK13),
Clock Group 1: (CLK2, CLK3), Clock Group 2 (CLK4, CLK5, CLK6, CLK7), Clock Group 3 (CLK8, CLK9,
CLK10, CLK11). Use frequency planning to minimize spur levels to the most critical outputs.
Frequency planning involves trial and error, but there is some strategy in planning. Try to ensure that the same
frequencies are placed on outputs that have the strongest crosstalk and that different frequencies are placed on
outputs that have weaker crosstalk
LMK04832-SEP
SNAS838A – OCTOBER 2022 – REVISED NOVEMBER 2022
www.ti.com
84
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Product Folder Links: LMK04832-SEP



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