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LMK04832PAP/EM Datasheet(PDF) 71 Page - Texas Instruments

Part # LMK04832PAP/EM
Description  LMK04832-SEP Space Grade Ultra-Low-Noise JESD204B/C Dual-Loop Clock Jitter Cleaner
PDF  102 Pages
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

LMK04832PAP/EM Datasheet(HTML) 71 Page - Texas Instruments

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8.6.2.7.3 CLKin2_R
Table 8-59. CLKin2_R[13:0]
MSB
LSB
0x157[5:0] / CLKin2_R[13:8]
0x158[7:0] / CLKin2_R[7:0]
Table 8-60. Registers 0x157 and 0x158
REGISTER
BIT
NAME
POR DEFAULT
DESCRIPTION
0x157
7:6
NA
0
Reserved
0x157
5:0
CLKin2_R[13:8]
0
The value of PLL1 R counter when CLKin2 is selected.
Field Value
Divide Value
0 (0x00)
Reserved
1 (0x01)
1
0x158
7:0
CLKin2_R[7:0]
150
2 (0x02)
2
...
...
16382 (0x3FFE)
16382
16383 (0x3FFF)
16383
8.6.2.7.4 PLL1_N
Table 8-61. PLL1_N[13:0]
MSB
LSB
0x159[5:0] / PLL1_N[13:8]
0x15A[7:0] / PLL1_N[7:0]
These registers contain the N divider value for PLL1.
Table 8-62. Registers 0x159 and 0x15A
REGISTER
BIT
NAME
POR DEFAULT
DESCRIPTION
0x159
7:6
NA
0
Reserved
0x159
5:0
PLL1_N[13:8]
0
The value of PLL1 N counter.
Field Value
Divide Value
0 (0x00)
Not Valid
1 (0x01)
1
0x15A
7:0
PLL1_N[7:0]
120
2 (0x02)
2
...
...
4,095 (0xFFF)
4,095
www.ti.com
LMK04832-SEP
SNAS838A – OCTOBER 2022 – REVISED NOVEMBER 2022
Copyright © 2022 Texas Instruments Incorporated
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