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DA6021 Datasheet(PDF) 167 Page - Renesas Technology Corp

Part # DA6021
Description  HIGHLY INTEGRATED POWER MANAGEMENT IC FOR INTEL® ATOM™ Z3000 PROCESSOR
PDF  225 Pages
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

DA6021 Datasheet(HTML) 167 Page - Renesas Technology Corp

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DA6021
HIGHLY INTEGRATED POWER MANAGEMENT IC FOR
INTEL® ATOM™ Z3000 PROCESSOR
Company Confidential
Data Sheet
Version 3.A - Final
31-Jan-14
© 2014 Dialog Semiconductor GmbH
167 of 224
www.dialog-semiconductor.com
SYSFRQA[1:0]
00
01
10
11
Specifies the frequency at which system temperature measurements
are initiated while system is in S0 mode
Disable
1s
4s
32s
BATFRQS
0
1
Specifies the frequency at which battery temperature measurements
are initiated while system is in S0iX mode
disable
32s
SYSFRQS
0
1
Specifies the frequency at which system temperature measurements
are initiated while system is in S0iX mode
disable
32s
Register Name
THRMMONCTL1
Address
0x8F
Page 1
Read/Write
Reset Value 0x02
MSB
LSB
R
R
R
R
R
R/W
R/W
R/W
reserved
PMICFRQS
PMICFRA
PMICFRQA[1:0]
00
01
10
11
Specifies the frequency at which PMIC die temperature
measurements are initiated while system is in S0 mode
Disable
1s
4s
32s
PMICFRQS
0
1
Specifies the frequency at which PMIC die temperature
measurements are initiated while system is in S0iX mode
disable
32s
The thermal monitoring is active only in state SOC_SX and SOC_S0.
Temperature monitoring of each thermistor may be enabled or disabled (register TS_ENABLE) depending on
whether the thermistor and its bias circuit is populated on the platform. This enables the thermal monitoring state
machine to know if any alert or interrupt associated with the thermistor should be generated. If in register
TS_ENABLE the corresponding enable bit is set, the thermistor is connected to the PMIC and the PMIC can poll
the sensor.
There are three pre-defined and programmable threshold for each of the measurements
ALERT0
ALERT1
TCRIT
Each ALERT has a 4-bit hysteresis and 4 STATUS bits (A0_ST, A1_ST, CRIT_ST) and for all the ALERT0 a
policy register (A0P_EN) is defined in order to allow actions upon crossing thresholds.



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