DA6021 datasheet(164/225 Pages) RENESAS

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DA6021

HIGHLY INTEGRATED POWER MANAGEMENT IC FOR

INTEL® ATOM™ Z3000 PROCESSOR

Company Confidential

Data Sheet

Version 3.A - Final

31-Jan-14

164 of 224

www.dialog-semiconductor.com

16.3.2.1

VSYS Waveform Example

Below is an explanation of the BCU VSYS trip points and how the voltage may behave under a given situation.

A table describes a select subset of the numbered events to describe expected BCU behavior.

Figure 68: VSYS Trip Points Flag Logic

System Event

BCU Response

SOC Response

Interrupts

Hardware Actions

Large system burst

event begins, dropping

VSYS

N/A

VSYS goes below

VWARNA BCU

threshold and into

Warning Zone A

After the de-bounce

period for VWARNA,

the BCU interrupts

SOC with BCUIRQ

and VWARNAIRQ

bits...

Assert BCUDISA

and/or PROCHOT_B

(if enabled as such)

Gets interrupt and knows

what hardware actions (if

any) have been done.

Clears BCUIRQ and

VWARNA interrupt bits.

VSYS goes back

above VWARNA

threshold due to BCU

response

After the de-bounce

period for VWARNA,

the BCU interrupts

SOC with BCUIRQ

and VWARNAIRQ

bits...

De-assert BCUDISA

and/or PROCHOT_B

(if not sticky)

Gets interrupt and knows

system is out of warning

Zone A. If pin assertion is

sticky, will clear BCUDISA

and/or PROCHOT_B

assertion.

A further large system

burst event begins,

dropping VSYS

N/A

VSYS goes below

VWARNB BCU

threshold and into

Warning Zone B

After the de-bounce

period for VWARNB,

the BCU interrupts

SOC with BCUIRQ

and VWARNBIRQ

bits...

Asserts BCUDISB

and/or PROCHOT_B

(if enabled as such)

Gets interrupt and knows

what hardware actions (if

any) have been done.

Clears BCUIRQ and

VWARNB interrupt bits.

Time

VCRIT

VWARNA

NOTE: Depending on configuration of the BCU, the

PMIC may also take hardware action above and

beyond simply interrupting the SOC

VWARNB

BCU Warning Zone B

BCU Safe Zone

BCU Warning Zone A

BCU Critical Zone

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