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PM73121 Datasheet(PDF) 126 Page - PMC-Sierra, Inc |
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PM73121 Datasheet(HTML) 126 Page - PMC-Sierra, Inc |
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126 / 223 page ![]() PMC-Sierra, Inc. PM73121 AAL1gator II PMC-980620 ,VVXH AAL1 SAR Processor Data Sheet QSPQSD@U6S`Ã6I9Ã8PIAD9@IUD6GÃUPÃQH8TD@SS6ÃDI8Ã6I9ÃAPSÃDUTÃ8VTUPH@ST¶ÃDIU@SI6GÃVT@ To eliminate conflicts for this access sequence, a recovery cycle is inserted between the micropro- cessor access and any subsequent access. /PROC_ACK is driven until /PROC_CS is deactivated. /SP_DATA_EN is driven until either /PROC_CS or /PROC_OE are deactivated. Cycles (1) and (2) are grouped together in Figure 72 for the sake of convenience. These are nor- mally two separate clock cycles. NOTE: The timing characteristics (indicated by asterisks in the table following Figure 72) are based on external component requirements. Figure 72. Microprocessor RAM Read Cycle Timing Symbol Parameter Signals Min Max Unit Taa (Refer to NOTE below) Acknowledge assertion after /PROC_CS or /PROC_RD; whichever comes last /PROC_ACK 5 29 SYS_CLK periods Tzen Time from z state to enable MEM_DATA, /MEM_OE 1** ns Tzen Tq Taed Tded Tded Tcea Taa Tq Tqmoe Tq Tdh Tasu Tq Tah Tcaen Tzsu Tdsu Tasu17 PROC RD CYCLE RECOVERY CYCLE NON-PROC CYCLE NON_PROC WR CYCLE 1, 2 3 4 5 6 SYS_CLK PROC_ADD PROC_DATA /PROC_CS(i) /PROC_RD(i)i) ADDR17(i) /PROC_ACK(o) /SP_DATA_EN(o) /SP_ADD_EN(o) SP_DATA_DIR(o) SP_DATA_CLK(o) MEM_ADDR(i) MEM_DATA(IO) /MEM_CS(o) /MEM_OE(o) /MEM_WE(o) |
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