TMPR3916 datasheet(135/225 Pages) TOSHIBA

135 / 225 page

Chapter 7 CAN Module (TXCAN)

Preliminary

7-14

Global Acceptance Mask (GAM)

Bit

31302928

Name

GAMI



GAM

Bit

Name

Function

Reset

Value

Mode

GAMI

0 = The identifier extension bit stored in the mailbox determines

which messages shall be received.

1 = Don’t care, standard and extended frames can be received. In

case of an extended frame all 29 bits of the identifier stored in

the mailbox and all 29 bits of the global acceptance mask

only the first eleven bits (bit 28 to 18) of the identifier and the

global acceptance mask will be used.

R/W

30:29



Wired to zero

28:0

GAM

For each incoming message, the global acceptance mask will be

used if the bit GAME is set. A received message will only be stored

in the first mailbox with a matching identifier.

R/W

The global acceptance mask will only be used for the mailboxes 0 to 14. After power-up, all bits are

cleared.

Master Control Register (MCR)

Bit

1514

131211

Name



SUR

INTLB

TSTLB

TSTERR

Bit

543

210

Name

CCR

SMR

TSBTEST

WUBA

MTOS



TSCC

SRES

Bit

Name

Function

Reset

Value

Mode

15:12



Wired to zero

SUR

Suspend Mode Request

0 = Normal operation requested

1 = Suspend mode is requested

R/W

INTLB

Internal Loop Back Enable

0 = Internal loop back is disabled in test mode

1 = Internal loop back is enabled in test mode

R/W

TSTLB

Test Loop back

0 = Normal operation requested

1 = Test loop back mode is requested.

This mode supports stand-alone operation.

R/W

TSTERR

Test Error

0 = Normal operation requested

1 = Test error mode is requested. In this mode, it is

possible to write the error counters (CEC).

R/W

CCR

Change Configuration Request.

0 = Normal operation requested

1 = Write access to the configuration registers (BCR1 and BCR2)

requested.

R/W

SMR

Sleep Mode Request

0 = The sleep mode is not requested (normal operation).

1 = The sleep mode is requested.

R/W

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