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TMPR3916 Datasheet(PDF) 149 Page - Toshiba Semiconductor

Part # TMPR3916
Description  32-Bit TX System RISC TX39 Family TMPR3916
PDF  225 Pages
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Manufacturer  TOSHIBA [Toshiba Semiconductor]
Direct Link  http://www.semicon.toshiba.co.jp/eng
Logo TOSHIBA - Toshiba Semiconductor

TMPR3916 Datasheet(HTML) 149 Page - Toshiba Semiconductor

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Chapter 7 CAN Module (TXCAN)
Preliminary
7-28
7.4.4
Test Loop Back Mode
In this mode TXCAN can receive its own transmitted message and will generate its own
acknowledge bit. No other CAN node is necessary for the operation.
When the INTLB bit of the MCR register is “0”, the internal loop back is disabled. The supposition
that TXCAN receives its own messages is that the RX and TX lines must be connected to a CAN bus
transceiver or directly together.
When the INTLB bit of the MCR register is set to “1”, the internal loop back is enabled. In this case,
there is no need to connect the RX and TX lines together or to a CAN bus transceiver to make the
TXCAN able to receive its own messages.
The “test loop back mode” shall only be enabled or disabled when TXCAN is in suspend mode. The
following figure shows the set-up procedure.
In “test loop back mode” TXCAN can transmit a message from one mailbox and receive it in another
mailbox. The set-up for the mailboxes is the same as in normal operation mode.
Enable/disable
test loop back mode
and/or test error mode
No
Yes
TXCAN is in normal
operation mode:
CCR=0 & CCE=0,
SUR=0 & SUA=0
SUA = 1 ?
Suspend mode request:
set SUR to “1”
Back to normal
operation mode with
enabled/disabled TSTLB
and/or TSTERR:
set SUR to “0”
Setup TSTLB and/or
TSTERR bit:
“1” enable,
“0” disable
SUA = 0 ?
End of setup;
TXCAN is in normal
operation mode with
enabled/disabled test loop
back and/or test error mode
Yes
No
Figure 7.4.2 Internal Test Flow Chart



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