TMPR3916 datasheet(147/225 Pages) TOSHIBA

147 / 225 page

Chapter 7 CAN Module (TXCAN)

Preliminary

7-26

7.4.2

Sleep Mode

The sleep mode will be requested by writing a “1” to SMR (MCR register). When the module enters

the sleep mode, the status bit “sleep mode acknowledge” (SMA, GSR register) will be set.

During sleep mode, the internal clock of TXCAN is switched off. Only the wake up logic will be

active. The read value of the GSR will be f040h, this means, there is no message in slot and the sleep

mode is active (SMA is set). Read accesses to all other registers will deliver the value 0000h. Write

accesses to all registers but the MCR will be denied.

The module leaves the sleep mode if a write access to MCR has been detected or there is any bus

activity detected on the CAN bus line (if the wake-up on bus activity is enabled).

The automatic “wake up on bus activity” can be enabled/disabled with the configuration bit WUBA

in MCR.

If there is a write access to MCR or any activity on the CAN bus line (with WUBA = 1), the module

begins its power-up sequence. The module waits until detecting 11 consecutive recessive bits on the RX

input line, afterwards it goes to bus active. The first message that initiates the bus activity cannot be

received.

In sleep mode, the CAN error counters and all “transmission requests” (TRS) and “transmission reset

requests” (TRR) will be cleared. After leaving the sleep mode, SMR and SMA will be cleared.

If the sleep mode is requested while TXCAN is transmitting a message, the module will not switch to

the sleep mode immediately. It will continue until a successful transmission or after losing the

arbitration, until

•

a successful transmission or

•

after loosing the arbitration a successful reception

occurs.

TMPR3916 Datasheet(PDF) 147 Page - Toshiba Semiconductor