 |
Electronic Components Datasheet Search |
|
|
Electronic Components Datasheet Search |
|
TMPR3916 Datasheet(PDF) 154 Page - Toshiba Semiconductor |
|
|
|||||||||||||||||||||||||||||
TMPR3916 Datasheet(HTML) 154 Page - Toshiba Semiconductor |
|
|
154 / 225 page  Chapter 8 Parallel Interface (PORT) Preliminary 8-1 8. Parallel Interface (PORT) The PORT-module is a general-purpose parallel interface. The PORT-Module contains the following features: • 30 pins • each pin can be configured independently as input or output • each pin can generate an interrupt on rising or falling edge of input-signal The PORT module shares its pins with modules GDC, TXSEI and UART. Bit assignment of all PORT registers: Bit 3130 292827 262524 Pin wired to zero PIO29 PIO28 PIO27 PIO26 PIO25 PIO24 Access RO R/W R/W R/W R/W R/W R/W Bit 2322 212019 181716 Pin PIO23 PIO22 PIO21 PIO20 PIO19 PIO18 PIO17 PIO16 Access R/W R/W R/W R/W R/W R/W R/W R/W Bit 1514 131211 10 9 8 Pin PIO15 PIO14 PIO13 PIO12 PIO11 PIO10 PIO9 PIO8 Access R/W R/W R/W R/W R/W R/W R/W R/W Bit 7 6 543 210 Pin PIO7 PIO6 PIO5 PIO4 PIO3 PIO2 PIO1 PIO0 Access R/W R/W R/W R/W R/W R/W R/W R/W Register Function: Each bit of the following registers is assigned to the corresponding pin. The table below describes the function of each register for one pin. Register Physical Address (hex) Function of One Bit Reset Value PAMUX 1C03 0014 Determines which module uses the pin. Each bit in this register represents the setting of one PIO. The upper both bits (31 and 30) are not relevant, because the TMPR3916F provides 30 PIOs. 0 = PORT module uses the pin 1 = GDC, TXSEI or UART (depending on the pin) Further descriptions see section “Pin Assignment” on next side. 0 PA 1C03 0000 This register contains data read from PORT pins or written to PORT pins. When a pin is used as input, then the corresponding bit in this register is read only. 0 PACR 1C03 0004 Direction of pin 0 = Input 1 = Output The contents of this bit shows no effect, when PAMUX = 1. 0 PAMSK 1C03 0010 Interrupt enable 0 = Disable interrupt 1 = Enable interrupt Whether the interrupt caused on falling or rising edge of input signal, depends on the contents of PALMX register. When the pin is used by another resource or the pin is used as output, the interrupt is inhibited. 0 |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
English ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
