TMPR3916 datasheet(156/225 Pages) TOSHIBA

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Chapter 9 Synchronous Serial I/O (TXSEI)

Preliminary

9-1

Synchronous Serial I/O (TXSEI)

The Toshiba TX Serial Expansion Interface is a synchronous communication unit and compatible to

peripheral devices, which can be connected to an SPI/SEI type interface.

TXSEI’s flexible clock control logic allows the selection of clock polarity and phase for the transfer protocol.

When TXSEI is configured as a master, a large number of different bit rates with up to 15 MHz clock rate in the

master mode can be selected. In slave mode transmissions up to 7.25 MHz are possible (assuming the

TMPR3916 is operating with 60 MHz)

The built-in error detection logic allows the detection of various error situations, which can occur during SEI

transfers.

TXSEI also offers DMA support for automated data transfers to its shift registers. By the use of DMA a larger

number of transfers can be scheduled at once. In particular, the usage of DMA allows a more cost-effective

implementation than usual large queue or buffer structures. TXSEI is able to perform seamless transfers of

consecutive frames. Alternatively, the minimum delay between two consecutive transfers is programmable for

master mode.

Feature Overview:

•

Phase and Polarity Selection

•

Transfer sizes of 5 to 16 bits

•

DMA operation: Full-Duplex 2 channels, Half-Duplex 1 channel

•

Built-in Error Detection Logic

•

4 frame transmit, 4 frame receive buffers

•

Compatible with SPI type interfaces

•

Master and Slave operation

•

15 Mbps data-rate when operated with 60 MHz clock rate.

•

Inter Frame Space Delay Feature

•

seamless transfer of large values without delay between consecutive frames

•

integrated MSB / LSB first reordering

•

Stop and Flush Buffer functionality for fast event response

•

programmable buffer-fill-level dependent receive / transmit interrupts

TMPR3916 Datasheet(PDF) 156 Page - Toshiba Semiconductor

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