Avance Logic Inc.
ALS300
20
MIXER.81
Sound Blaster DMA setup 1
Default 00h
Bit 7..4
reserved, read as 0
Bit 3
DMA3 for SB DMA command
Bit 2
reserved, read as 0
Bit 1
DMA1 for SB DMA command
Bit 0
DMA0 for SB DMA command
0: disable DMA
1: enable DMA
Any write to PnP logical device 0 port 74h will set one of this register bit3-0 as 1.
Write this register will generate SB-MIXER IRQ except in PnP configuration state.
MIXER.82
interrupt status
Read only
Default 00h
Bit 7~4
reserved
Bit 3
Special MPU401 interrupt request
Bit 2
MPU-401 MIDI interrupt request
Bit 1
BX type command DMA interrupt request
Bit 0
non-BX type command DMA interrupt request
0 : no interrupt
1 : interrupt triggered
Bit 0,1 always use SB IRQ line, bit 2 can share SB IRQ line only when MPU401 IRQ line is programmed
to be the same as SB IRQ line by PnP manager. Normally bit 2 use MPU401 IRQ line.
MIXER.8D
ALS300 backward compatible register
Default 03h (Version F or latter Default = 07h)
Read/write
Bit 7..3
reserved,read as 0
Bit 2
continuous DMA operation mode
0
IRQ controlled continuous DMA mode.
1
FIFO controlled continuous DMA mode.
Bit1,0
reserved(read as 1)
MX8D.2 is the ghost bit of CR0.1.
Control Register Definition:
CR0
Sound Blaster configuration
Default 00h (Version F or latter Default = 06h)
Read/write
Bit 7..6
reserved, read as 0
Bit 5
Reserved, read as 0
Bit 4
DMA block enable for SB DMA command
Bit 3
DMA block request size
Bit 2
DMA mode control for 90h command
Bit 1
continuous DMA mode control
Bit 0
reserved
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