Avance Logic Inc.
ALS300
6
POWER MANAGEMENT REGISTER:
8 bit read / write
Default FFh
Bit 7
FM clock select
1 : 14.318M or 14.318M/8
0 : 2M (from internal clock chip)
Bit 6
X
Reserved for future usage
Bit 5
0
power down OPL3
Bit 4
0
power down wave engine
Bit 3
X
Reserved
Bit 2
X
Reserved
Bit 1
0
power down MPU401 block
Bit 0
X
reserved for future usage
Every bit of this register can read/write by PC and set to 1 by PC reset or by activity register specific bit
is set to 1. Wave engine is waked up by bit 4 of activity register any time.
ACTIVITY STATUS REGISTER:
Read only
Default 00h
Bit 7,6
X
reserved, read as 0
Bit 5
1
OPL3 is active
Bit 4
1
wave engine is active
Bit 3
X
reserved, read as 0
Bit 2
X
reserved, read as 0
Bit 1
1
MPU401 block is active
Bit 0
X
reserved, read as 0
Any read of this register will clear all bits to zero. Each bit will be set when any of the following
conditions happened:
Bit 5 = I/O access of OPL3 register (chip select active)
Bit 4 = CR3.5 & Bit 1
Bit 1 = I/O access of MPU401 port + MIDIIN input has ever been low
POWER DOWN REGISTER:
Read / write
Default A5h
Bit 7-0
software power down byte
When write 5Ah to this register, ALS300 will enter S/W power down mode until wake up by write with
A5h. All other value will be ignored.
Game Port Definition:
When I/O write to gameport, ALS300 will drive GD3, GD2, and GD1 low with 3-5ns time delay from
each other. After system IO write command goes inactive(SIOW_ goes high), ALS300 will sustain to
drive low for extra 2us time period. At this time period, any read to gameport will force ALS300 to drive
SD0-3 with 1 and SD7-4 with input data form GD7-GD4. After this time period, ALS300 will drive
SD0-7 with input data from those pins when I/O read to gameport.
ALS300 implement GD0 differently from GD1~3. It usually drive GD0 to low. When Game-port
write command is active, GD0 is tri-state until level on GD0 is high again. This implementation work
fine with analog joystick and digital game pad.
English ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
