HD64F36049 datasheet(333/562 Pages) RENESAS

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Section 17 Serial Communication Interface 3 (SCI3)

Rev. 3.00 Mar. 15, 2006 Page 301 of 526

REJ09B0060-0300

Note:

1. In addition to basic functions common to SCI3 and SCI3_2, SCI3_3 has the serial mode

control register (SMCR). SMCR controls taking noise from the RXD_3 input signal,

P92/TxD_3 pin function, and SCI3_3 module standby function.

2. The channel 1 of the SCI3 is used in on-board programming mode by boot mode.

• Serial mode control register (SMCR)

Bit

Bit Name

Initial Value

R/W

Description

7 to 3



All 1



Reserved

These bits are always read as 1.

NFEN_3

R/W

Noise Cancel Function Select

When COM in SMR is cleared to 0 and this

bit is set to 1, noise in the RXD_3 input signal

is taken.

TXD_3

R/W

TXD_3 Pin Select

Selects P92/TXD_3 pin function.

0: General input pin is selected

1: TXD_3 output pin is selected

MSTS3_3

R/W

SCI3_3 Module Standby

When this bit is set to 1, SCI3_3 enters in the

standby state.

• Noise canceller

The RXD_3 input signal is loaded internally via the noise canceller. The noise canceller

consists of three latch circuits and match detection circuit connected in series. The

RXD_3 input signal is sampled on the basic clock with a frequency 16 times the

transfer rate, and the level is passed forward to the next circuit when outputs of three

latches match. When the outputs are not match, previous value is retained. In other

word, when the same level is retained more than three clocks, the input signal is

acknowledged as a signal. When the level is changed within three clocks, the change is

acknowledged as not a signal change but noise.

HD64F36049 Datasheet(PDF) 333 Page - Renesas Technology Corp

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