HD64F36049 datasheet(119/562 Pages) RENESAS

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Section 6 Power-Down Modes

Rev. 3.00 Mar. 15, 2006 Page 87 of 526

REJ09B0060-0300

6.4.2

Direct Transition from Subactive Mode to Active Mode

The time from the start of SLEEP instruction execution to the end of interrupt exception handling

(the direct transition time) is calculated by equation (2).

Direct transition time = {(number of SLEEP instruction execution states) + (number of internal

processing states)}

× (tsubcyc before transition) + {(waiting time set in bits STS2 to STS0) +

(number of interrupt exception handling states)}

× (tcyc after transition)

(2)

Example:

Direct transition time = (2 + 1)

× 8 tw + (8192 + 16) × tosc = 24 tw + 8208 tosc

(when the CPU operating clock of

w/8 → φosc and a waiting time of 8192 states are

selected)

[Legend]

tosc:

OSC clock cycle time

tw:

Watch clock cycle time

tcyc:

System clock (

φ) cycle time

tsubcyc:

Subclock (

SUB) cycle time

6.5

Module Standby Function

The module-standby function can be set to any peripheral module. In the module standby state, the

clock supply to modules stops to enter the power-down mode. Setting a bit in MSTCR1,

MSTCR2, or SMCR that corresponds to each module to 1 enables each on-chip peripheral module

to enter the module standby state and the module standby state is canceled by clearing the bit to 0.

HD64F36049 Datasheet(PDF) 119 Page - Renesas Technology Corp