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HD64F36049 Datasheet(PDF) 200 Page - Renesas Technology Corp |
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HD64F36049 Datasheet(HTML) 200 Page - Renesas Technology Corp |
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200 / 562 page ![]() Section 12 Timer V Rev. 3.00 Mar. 15, 2006 Page 168 of 526 REJ09B0060-0300 12.3.2 Time Constant Registers A, B (TCORA, TCORB) TCORA and TCORB have the same function. TCORA and TCORB are 8-bit readable/writable registers. TCORA and TCNTV are compared at all times. When the TCORA and TCNTV contents match, CMFA is set to 1 in TCSRV. If CMIEA is also set to 1 in TCRV0, a CPU interrupt is requested. Note that they must not be compared during the T3 state of a TCORA write cycle. Timer output from the TMOV pin can be controlled by the identifying signal (compare match A) and the settings of bits OS3 to OS0 in TCSRV. TCORA and TCORB are initialized to H'FF. |
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