HD64F36049 datasheet(269/562 Pages) RENESAS

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Section 14 Timer Z

Rev. 3.00 Mar. 15, 2006 Page 237 of 526

REJ09B0060-0300

14.4

Operation

14.4.1

Counter Operation

When one of bits STR0 and STR1 in TSTR is set to 1, the TCNT counter for the corresponding

channel begins counting. TCNT can operate as a free-running counter, periodic counter, for

example. Figure 14.7 shows an example of the counter operation setting procedure.

[1]

Select the counter clock with bits

TPSC2 to TPSC0 in TCR.

When an external clock is selected,

select the external clock edge

with bits CKEG1 and CKEG0 in TCR.

[2]

For periodic counter operation, select

the TCNT clearing source with bits

CCLR2 to CCLR0 in TCR.

[3]

Designate the general register

selected in [2]

as an output compare register by

means of TIOR.

[4]

Set the periodic counter cycle in the

general register selected in [2].

[5]

Set the STR bit in TSTR to 1 to start

the counter operation.

Operation selection

Periodic counter

Free-running counter

[1]

Select counter clock

[2]

Select counter clearing source

[3]

Select output compare register

[5]

Start count operation

[4]

Set period

Figure 14.7 Example of Counter Operation Setting Procedure

HD64F36049 Datasheet(PDF) 269 Page - Renesas Technology Corp

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