| Electronic Components Datasheet Search |
|
HD64F36049 Datasheet(PDF) 268 Page - Renesas Technology Corp |
|
|
|||||||||||||||||||||||||||||
HD64F36049 Datasheet(HTML) 268 Page - Renesas Technology Corp |
|
268 / 562 page ![]() Section 14 Timer Z Rev. 3.00 Mar. 15, 2006 Page 236 of 526 REJ09B0060-0300 14.3.14 Interface with CPU 1. 16-bit register TCNT and GR are 16-bit registers. Reading/writing in a 16-bit unit is enabled but disabled in an 8-bit unit since the data bus with the CPU is 16-bit width. These registers must always be accessed in a 16-bit unit. Figure 14.5 shows an example of accessing the 16-bit registers. H Internal data bus Bus interface Module data bus C P U L TCNTL TCNTH Figure 14.5 Accessing Operation of 16-Bit Register (between CPU and TCNT (16 bits)) 2. 8-bit register Registers other than TCNT and GR are 8-bit registers that are connected internally with the CPU in an 8-bit width. Figure 14.6 shows an example of accessing the 8-bit registers. TSTR H Internal data bus Bus interface Module data bus C P U L Figure 14.6 Accessing Operation of 8-Bit Register (between CPU and TSTR (8 bits)) |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |