| Electronic Components Datasheet Search |
|
HD64F36049 Datasheet(PDF) 267 Page - Renesas Technology Corp |
|
|
|||||||||||||||||||||||||||||
HD64F36049 Datasheet(HTML) 267 Page - Renesas Technology Corp |
|
267 / 562 page ![]() Section 14 Timer Z Rev. 3.00 Mar. 15, 2006 Page 235 of 526 REJ09B0060-0300 14.3.13 PWM Mode Output Level Control Register (POCR) POCR control the active level in PWM mode. Timer Z has two POCR registers, one for each channel. Bit Bit Name Initial Value R/W Description 7 to 3 All 1 Reserved These bits are always read as 1. 2 POLD 0 R/W PWM Mode Output Level Control D 0: The output level of FTIOD is low-active 1: The output level of FTIOD is high-active 1 POLC 0 R/W PWM Mode Output Level Control C 0: The output level of FTIOC is low-active 1: The output level of FTIOC is high-active 0 POLB 0 R/W PWM Mode Output Level Control B 0: The output level of FTIOB is low-active 1: The output level of FTIOB is high-active |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |