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HD64F36049 Datasheet(PDF) 317 Page - Renesas Technology Corp |
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HD64F36049 Datasheet(HTML) 317 Page - Renesas Technology Corp |
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317 / 562 page ![]() Section 14 Timer Z Rev. 3.00 Mar. 15, 2006 Page 285 of 526 REJ09B0060-0300 6. Contention between Count Clearing and Increment Operations by Input Capture: If an input capture and increment signals are simultaneously generated, count clearing by the input capture operation has priority without an increment operation. The TCNT contents before clearing counter are transferred to GR. Figure 14.57 shows the timing in this case. TCNT Input capture signal Counter clear signal TCNT input clock Clearing has priority. N H'0000 GR N φ Figure 14.57 Contention between Count Clearing and Increment Operations by Input Capture |
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