HD64F36049 datasheet(313/562 Pages) RENESAS

Part #	HD64F36049

Description	Renesas 16-Bit Single-Chip Microcomputer H8 Family / H8/300H Tiny Series

PDF	562 Pages

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Manufacturer	RENESAS [Renesas Technology Corp]

Direct Link	http://www.renesas.com

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Section 14 Timer Z

Rev. 3.00 Mar. 15, 2006 Page 281 of 526

REJ09B0060-0300

14.6

Usage Notes

1. Contention between TCNT Write and Clear Operations: If a counter clear signal is generated

in the T

2 state of a TCNT write cycle, TCNT clearing has priority and the TCNT write is not

performed. Figure 14.52 shows the timing in this case.

TCNT

TCNT write cycle

TCNT address

WTCNT

(internal write signal)

Clearing has priority.

Counter clear signal

H'0000

Figure 14.52 Contention between TCNT Write and Clear Operations

2. Contention between TCNT Write and Increment Operations: If incrementation is done in T

state of a TCNT write cycle, TCNT writing has priority. Figure 14.53 shows the timing in this

case.

TCNT

TCNT write cycle

TCNT address

WTCNT

(internal write signal)

TCNT input clock

TCNT write data

Figure 14.53 Contention between TCNT Write and Increment Operations

HD64F36049 Datasheet(PDF) 313 Page - Renesas Technology Corp