SH7101 datasheet(103/486 Pages) RENESAS

103 / 486 page

6. Interrupt Controller (INTC)

Rev.2.00 Sep. 27, 2007 Page 69 of 448

REJ09B0394-0200

6.3.1

Interrupt Control Register 1 (ICR1)

ICR1 is a 16-bit register that sets the input signal detection mode of the external interrupt input

pins NMI and

IRQ0 to IRQ3 and indicates the input signal level at the NMI pin.

Bit

Bit Name

Initial

Value

R/W

Description

NMIL

1/0

NMI Input Level

Sets the level of the signal input to the NMI pin. This bit

can be read to determine the NMI pin level. This bit

cannot be modified.

0: NMI input level is low

1: NMI input level is high

14 to 9

⎯

All 0

Reserved

These bits are always read as 0. The write value should

always be 0.

NMIE

R/W

NMI Edge Select

0: Interrupt request is detected on falling edge of NMI

input (Initial value)

1: Interrupt request is detected on rising edge of NMI

input

IRQ0S

R/W

IRQ0 Sense Select

This bit sets the IRQ0 interrupt request detection mode.

0: Interrupt request is detected on low level of IRQ0 input

1: Interrupt request is detected on edge of IRQ0 input

(edge direction is selected by ICR2)

IRQ1S

R/W

IRQ1 Sense Select

This bit sets the IRQ1 interrupt request detection mode.

0: Interrupt request is detected on low level of IRQ1 input

1: Interrupt request is detected on edge of IRQ1 input

(edge direction is selected by ICR2)

IRQ2S

R/W

IRQ2 Sense Select

This bit sets the IRQ2 interrupt request detection mode.

0: Interrupt request is detected on low level of IRQ2 input

1: Interrupt request is detected on edge of IRQ2 input

(edge direction is selected by ICR2)

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