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7480 Datasheet(PDF) 162 Page - Renesas Technology Corp |
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7480 Datasheet(HTML) 162 Page - Renesas Technology Corp |
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162 / 337 page ![]() 7480 Group and 7481 Group User's Manual 1-145 HARDWARE Figure 1.15.5 Change of A-D Conversion Register and Comparison Voltage during A-D Conversion A-D conversion interrupt When A-D conversion is completed, the A-D conversion completion interrupt request bit of interrupt request register 1 is set to ‘1’; then an A-D conversion completion interrupt request is generated. Reads from A-D conversion register When A-D conversion is completed, the A-D conversion register is read to obtain the A-D conversion result. The completion of A-D conversion can be acknowledged by any of the following conditions: • The A-D conversion completion bit is ‘1’. • The A-D conversion completion interrupt request bit is ‘1’. • The branch to A-D conversion completion interrupt service routine occurs (when A-D conversion completion interrupt enabled). Note: Do not read from the A-D conversion register during A-D conversion operation. A-D conversion time A-D conversion ends in 50 cycles after its start. Because the A-D converter uses the clock input divided by 2, f(XIN)/2, as the operating clock, A-D conversion time is fundamentally obtained by the following formula: A-D conversion time = × conversion cycles (50 cycles) (12.5 µs at f(XIN) = 8 MHz) 1.15 A-D Converter 1 0000 0 0 0 12 10 0 0 0 0 1 000 0 0 0 1 12 3 4 5 6 7 1 VREF 2 VREF 512 VREF 2 VREF 4 VREF 512 VREF 2 VREF 4 VREF 8 VREF 512 00 0 0 0 0 0 0 0 m 12 3 45 6 7 8 VREF 2 VREF 4 VREF 8 VREF 512 VREF 256 ....... m ..... The contents of A-D conversion register At A-D conversion start At the first comparison start At the second comparison start At the third comparison start At the eighth comparison start At A-D conversion completed (at the eighth conversion completed) The digital value corresponding to analog input voltage : The determined value obtained by the m-th (m=1 to 8) comparison result Comparison voltage (Vref) [V] – ± ± ± ± ± ± – – – 2 f(XIN) |
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