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7480 Group and 7481 Group User's Manual

1-149

HARDWARE

1.16 Watchdog Timer

If a program cannot run a normal loop by a runaway, etc., the watchdog timer provides the means of

returning the CPU to the reset state.

In the 7480 Group and 7481 Group, invalidating the STP and WIT instructions causes a runaway to be

detected more effectively. For the selection of the valid/invalid of the STP and WIT instructions, refer to

Section 1.19 Power Saving Function.

The watchdog timer is comprised of 7-bit watchdog timer L and 8-bit watchdog timer H (address 00FE16).

1.16.1 Block Diagram of Watchdog Timer

Figure 1.16.1 shows the block diagram of the watchdog timer.

Figure 1.16.1 Block Diagram of Watchdog Timer

1.16.2 Registers Associated with Watchdog Timer

Figure 1.16.2 shows the memory map of the registers associated with the watchdog timer.

1.16 Watchdog Timer

bit 7

Data bus

1/16

1/8

XIN

RESET

‘7F16’ is set when writing to

watchdog timer H

‘FF16’ is set when writing to

watchdog timer H

Watchdog timer L

(7 bits)

Watchdog timer H

(8 bits)

‘0’

‘1’

Watchdog timer L count

source selection bit

Internal reset

Reset circuit

00EF16

00FB16

Watchdog timer H (WDTH)

CPU mode register (CPUM)

Figure 1.16.2 Memory Map of Registers Associated with Watchdog Timer

7480 Datasheet(PDF) 166 Page - Renesas Technology Corp