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OR3C80 Datasheet(PDF) 130 Page - Agere Systems |
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OR3C80 Datasheet(HTML) 130 Page - Agere Systems |
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130 / 210 page  130 Lucent Technologies Inc. Data Sheet June 1999 ORCA Series 3C and 3T FPGAs Timing Characteristics (continued) Table 58. OR3C/Txxx Input to Fast Clock Setup/Hold Time (Pin-to-Pin) OR3Cxx Commercial: VDD = 5.0 V ± 5%, 0 °C < TA < 70 °C; Industrial: VDD = 5.0 V ± 10%, –40 °C < TA < +85 °C. OR3Txxx Commercial: VDD = 3.0 V to 3.6 V, 0 °C < TA < 70 °C; Industrial: VDD = 3.0 V to 3.6 V, –40 °C < TA < +85 °C. Notes: The pin-to-pin timing parameters in this table should be used instead of results reported by ORCA Foundry. The FCLK delays are for a fully routed clock tree that uses the ExpressCLK input into the fast clock network. It includes both the input buffer delay and the clock routing to the PFU CLK input. The delay will be reduced if any of the clock branches are not used. Description (TJ = 85 °C, VDD = min) Device Speed Unit -4 -5 -6 -7 MinMax MinMax MinMax Min Max Output Not on Same Side of Device As Input Clock (Fast Clock Delays Using ExpressCLK Inputs) Input to FCLK Setup Time (middle ECLK pin) OR3T20 OR3T30 OR3C/T55 OR3C/T80 OR3T125 — — 0.00 0.00 — — — — — — 0.00 0.00 0.00 0.00 0.00 — — — — — 0.00 0.00 0.00 0.00 0.00 — — — — — 0.00 0.00 0.00 0.00 0.00 — — — — — ns ns ns ns ns Input to FCLK Setup Time (middle ECLK pin, delayed data input) OR3T20 OR3T30 OR3C/T55 OR3C/T80 OR3T125 — — 0.29 0.14 — — — — — — 0.80 0.74 0.62 0.50 0.22 — — — — — 0.58 0.55 0.51 0.46 0.33 — — — — — 2.20 2.17 2.11 2.06 1.90 — — — — — ns ns ns ns ns Input to FCLK Setup Time (corner ECLK pin) OR3T20 OR3T30 OR3C/T55 OR3C/T80 OR3T125 — — 0.00 0.00 — — — — — — 0.00 0.00 0.00 0.00 0.00 — — — — — 0.00 0.00 0.00 0.00 0.00 — — — — — 0.00 0.00 0.00 0.00 0.00 — — — — — ns ns ns ns ns Input to FCLK Setup Time (corner ECLK pin, delayed data input) OR3T20 OR3T30 OR3C/T55 OR3C/T80 OR3T125 — — 0.00 0.00 — — — — — — 0.00 0.00 0.00 0.00 0.00 — — — — — 0.00 0.00 0.00 0.00 0.00 — — — — — 0.00 0.00 0.00 0.00 0.00 — — — — — ns ns ns ns ns Input to FCLK Hold Time (middle ECLK pin) OR3T20 OR3T30 OR3C/T55 OR3C/T80 OR3T125 — — 6.33 6.95 — — — — — — 4.29 4.50 4.97 5.49 6.36 — — — — — 3.72 3.80 3.96 4.15 4.47 — — — — — 3.27 3.35 3.52 3.72 4.05 — — — — — ns ns ns ns ns |
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