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TMPR28051 Datasheet(PDF) 82 Page - Agere Systems

Part # TMPR28051
Description  TMPR28051 STS-1/AU-3 (STM-0) Mapper Device Advisory for Version 5 of the Device
PDF  90 Pages
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Manufacturer  AGERE [Agere Systems]
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TMPR28051 Datasheet(HTML) 82 Page - Agere Systems

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Data Sheet
TMPR28051 STS-1/AU-3 (STM-0) Mapper
August 1999
68
Lucent Technologies Inc.
Timing Characteristics (continued)
Operational Timing (continued)
Table 39 lists the setup time (tSU) and hold time (tH) specifications for the receive input and JTAG signals. The digi-
tal system interface timing is shown in Figure 11.
* These clock edges are programmable through the microprocessor interface.
Notes:
↑ represents a low-to-high transition.
↓ represents a high-to-low transition.
5-5342(F)r.5
Figure 11. Interface Data Timing
Table 39. Input Timing Specifications
Input Name
Reference CLK*
Setup Time
(tSU)
Hold Time
(tH)
Unit
Min
Max
Min
Max
Receive Signals
TSTS1SYNC
TSTS1CLKIN
5
—
2
—
ns
RDATA[1:28]
RCLK[1:28]
↑↓
50
—
40
—
ns
RSTS1DATA[7:0]
RSTS1CLK
↑↓
15
—
2
—
ns
RSTS1PAR
RSTS1CLK
↑↓
15
—
2
—
ns
RSTS1SERIAL
RSTS1CLK
↑↓
5—
2—
ns
JTAG Signal
TDI
TCK
↑
50
—
50
—
ns
CLOCK IN
DATA IN
tSU
tH
CLOCK OUT
DATA OUT
tPD



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