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TMPR28051 Datasheet(PDF) 16 Page - Agere Systems |
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TMPR28051 Datasheet(HTML) 16 Page - Agere Systems |
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16 / 90 page ![]() Data Sheet TMPR28051 STS-1/AU-3 (STM-0) Mapper August 1999 2 Lucent Technologies Inc. Table of Contents Contents Page Features ................................................................................................................................................................... 1 Applications .............................................................................................................................................................. 1 Description ................................................................................................................................................................ 1 Block Diagram .......................................................................................................................................................... 5 Pin Information ......................................................................................................................................................... 6 Nomenclature Assumptions .................................................................................................................................... 10 DS1/E1 to STS-1 Block Descriptions ..................................................................................................................... 10 LOC and AIS Monitor ......................................................................................................................................... 10 DS1/E1 Loopback Select Logic .......................................................................................................................... 10 Input Select Logic ............................................................................................................................................... 10 Elastic Store ....................................................................................................................................................... 11 VT Generate ....................................................................................................................................................... 11 STS-1/AU-3 Generate ........................................................................................................................................ 13 SPE Insertion Logic ............................................................................................................................................ 14 STS-1 to DS1/E1 Block Descriptions ..................................................................................................................... 16 Loopback Select Logic ....................................................................................................................................... 16 SPE Locate ......................................................................................................................................................... 16 STS-1/AU-3 Terminate ....................................................................................................................................... 16 SPE Drop Logic ..................................................................................................................................................17 VT Terminate ...................................................................................................................................................... 17 Jitter Attenuate ................................................................................................................................................... 18 Drop Select Logic ............................................................................................................................................... 18 Test Pattern Block Descriptions ............................................................................................................................. 19 Test Pattern Insert .............................................................................................................................................. 19 Test Pattern Drop ............................................................................................................................................... 19 Microprocessor Interface Description ..................................................................................................................... 20 Overview ............................................................................................................................................................. 20 Microprocessor Configuration Modes ................................................................................................................. 20 Microprocessor Interface Pins ............................................................................................................................ 21 Register Architecture Map .................................................................................................................................. 23 Register Architecture Description ....................................................................................................................... 37 I/O Timing ........................................................................................................................................................... 60 Absolute Maximum Ratings .................................................................................................................................... 65 Handling Precautions ............................................................................................................................................. 65 Operating Conditions .............................................................................................................................................. 66 Electrical Characteristics ........................................................................................................................................ 66 Timing Characteristics ............................................................................................................................................ 67 Operational Timing ............................................................................................................................................. 67 Transmit Sync Timing ......................................................................................................................................... 70 Receive Sync Timing .......................................................................................................................................... 71 Typical Uses ........................................................................................................................................................... 72 Path Termination Multiplex ................................................................................................................................. 72 Digital Cross Connect ......................................................................................................................................... 72 Test Pattern Use—Complete System ................................................................................................................. 73 Test Pattern Use—End to End ........................................................................................................................... 73 Outline Diagram ...................................................................................................................................................... 74 208-Pin SQFP .................................................................................................................................................... 74 Ordering Information ............................................................................................................................................... 75 DS99-068SONT Replaces DS98-100TIC to Incorporate the Following Updates ................................................... 75 |
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