TMPR28051 datasheet(72/90 Pages) AGERE

72 / 90 page

Data Sheet

TMPR28051 STS-1/AU-3 (STM-0) Mapper

August 1999

Lucent Technologies Inc.

Microprocessor Interface Description (continued)

Detected REI Errors (0xC0—0xFD)

Table 29. Registers 0xC0—0xFD: Detected REI Errors

Note: Bits in registers 0xC0—0xFF can have one of four configurations, depending upon the setting of register

0xBF. When register 0xBF is set for BIP_CNTS = 0 and REI_CNTS = 1, the bytes in registers 0xC0—0xFD

are used to count the number of REI errors detected by the device.

* These registers are not contiguous, i.e., every other register in this group is shown (0xC6, 0xC8, 0xCA, . . . 0xFC) per the register map, page

31 and page 32.

† These registers are not contiguous, i.e., every other register in this group is shown (0xC7, 0xC9, 0xCB, . . . 0xFD) per the register map, page

31 and page 32.

Table 30. Registers 0xFE—0xFF: Reserved

When register 0xBF is set for BIP_CNTS = 0 and REI_CNTS = 1, the bytes in registers 0xFE—0xFF are reserved.

Address

(Hex)

Bit #

Name

Function

Reset

Default

(Hex)

0xC0

7—0

—

Reserved. These bits are set to 0.

Value is

0xC1

7—0

0xC2

7—0

B2REI-[15:8]

Registers 0xC2—0xC5. The registers, 0xC2—0xC5, are

the REI errors detected by B2 and B3 (see the STS-1/AU-3

Terminate section, page 16 and page 17).

0xC3

7—0

B2REI-[7:0]

0xC4

7—0

B3REI-[15:8]

0xC5

7—0

B3REI-[7:0]

0xC6—

0xFC*

7VT[1:28]PTR–3

Registers 0xC6—0xFD. The remaining registers in the

block indicate the errors seen by the REI error detectors in

the individual VT1.5 slots. Since the VT REI errors only

require 11 bits, the VT pointer decrement counts are also

presented in these registers. The values in all of these

counters is latched by the LATCH_CNT bit

(bit 3) in register 0x00. (See the STS-1/AU-3 Terminate

section, page 16 and page 17.)

Note: In registers 0xC6—0xFC, bit 3 is reserved.

6VT[1:28]PTR–2

5VT[1:28]PTR–1

4VT[1:28]PTR–0

3—

2VTREI10_[1:28]

1VTREI9_[1:28]

0VTREI8_[1:28]

0xC7—

0xFD†

7VTREI7_[1:28]

6VTREI6_[1:28]

5VTREI5_[1:28]

4VTREI4_[1:28]

3VTREI3_[1:28]

2VTREI2_[1:28]

1VTREI1_[1:28]

0VTREI0_[1:28]

Address

(Hex)

Bit #

Name

Function

Reset

Default

(Hex)

0xFE

7—0

—

Reserved. These bits are set to 0.

0x00

0xFF

7—0

0x00

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