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TMPR28051 Datasheet(PDF) 24 Page - Agere Systems |
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TMPR28051 Datasheet(HTML) 24 Page - Agere Systems |
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24 / 90 page ![]() Data Sheet TMPR28051 STS-1/AU-3 (STM-0) Mapper August 1999 10 Lucent Technologies Inc. Nomenclature Assumptions The mapping methods (VT1.5, VT2, and VT Group in ANSI nomenclature; TU-11, TU-12, and TUG-2 in ITU nomenclature) are analogous, and for the rest of this document will be referred to as VT1.5, VT2, or VT Group. STS-1 and AU-3 are also analogous with a few minor differences. For the remainder of this document, the 51.84 Mbits/s signals are referred to as STS-1. DS1/E1 to STS-1 Block Descriptions In the descriptions of the block diagram of Figure 1, some of the control bits exist for each of the DS1/E1 or VT signals. Upon start-up, the device will set all of the input data types (DS1 or E1) based on the level of the DS1_E1N pin (pin 102). DS1_E1N controls the value transmitted in the unused overhead bytes and the value of the transmitted spare bits (SS) in the H1 byte. If this pin is high, then all of the VT Groups are populated with DS1 signals. If this pin is low, then all of the VT Groups are populated with E1 signals. This default selection can be overridden by setting TOVERRIDE and ROVERRIDE bits in registers 0x88 (bit 0) and 0x89 (bit 0), respectively. The seven VT Groups can then be individually programmed to carry either DS1 (TVTG-1 . . . 7 = 1, RVTG-1 . . . 7 = 1) or E1 (TVTG-1 . . . 7 = 0, RVTG-1 . . . 7 = 0) signals. LOC and AIS Monitor The incoming DS1/E1 signal is first checked for loss of clock (LOC). LOC is reported to the microprocessor via the DS1/E1LOC[1:21] and DS1LOC[22:28] bit (LOC = 1, 0 otherwise) in registers 0x17—0x32 (bit 6) and also via the AISLOCCOM composite bit in register 0x05 (bit 1). If LOC is present, the device inserts DS1/ E1 AIS towards the STS-1 using the blue signal clock. The incoming DS1/E1 data (RDATA[28:1]) is retimed immediately by the associated DS1/E1 clock (RCLK[28:1]). The edge of the clock that is used to retime the data is user-provisionable at the device level to either the rising edge (RXDS1EDGE = 1) in register 0x02 (bit 1) or falling edge (RXDS1EDGE = 0) in regis- ter 0x02 (bit 1). After being retimed, the incoming data stream is checked for AIS. The device will declare AIS if the input data is at logic 1 for 3 ms. The device will withstand up to eight errors in the 3 ms period. AIS is reported to the microprocessor via the AISLOCCOM composite bit in register 0x05 (bit 1) and the individual DS1/E1AIS[1:21] and DS1AIS[22:28] bits in registers 0x17—0x32 (bit 7). The blue signal clock input signal to the device can be at the exact DS1/E1 rate (1.544/2.048 MHz) or at 16 times the DS1/E1 rate (24.704/32.768 MHz), with a tol- erance of 32 ppm or 50 ppm for DS1 or E1, respec- tively. This allows users of the Lucent Technologies T7698FL3/T7693 devices to reuse the XCLK on the board. The TMPR28051 is provisioned to accept the exact DS1 rate by default (BLUECLKSEL = 0 in bit 2 of register 0x00), but can be changed to perform the divide-by-16 function (BLUECLKSEL = 1 in bit 2 of reg- ister 0x00). The duty cycle of the clock can be 45%/ 55% because the data is retimed internally in the device. The duty cycle requires a much tighter toler- ance when used for XCLK as described earlier. DS1/E1 Loopback Select Logic The first stage after retiming the signal into the device is selection of the externally received DS1/E1 (DS1/E1LB[1:21] or DS1LB[22:28] = 0) or the looped back DS1/E1 (DS1/E1LB[1:21] or DS1LB[22:28] = 1). This selection is provisionable per DS1/E1 input in reg- isters 0x17—0x32 (bit 5). Input Select Logic Once the DS1/E1 data sources have been selected, the DS1/E1 for each VT tributary is selected. This selection requires 5 bits per slot to determine which DS1/E1 input to use by provisioning DS1/E1INS[4:0]_[1:21] or DS1INS[4:0]_[22:28] bits in registers 0x17—0x32 (bits 4 through 0). The range [1:28] following the _ refers to the target VT #. Refer to Table 8 on page 15 and Table 10 on page 15 for details on the VT locations within the SPE. The numbering scheme for the five provisioned bits ranges from 00001 to 11100 where the binary value of the 5 bits corresponds to the DS1/E1 input. For instance, the value 00001 corresponds to selecting DS1/E1 #1. The unused value of 00000 results in VT unequipped being transmitted. This is the default value for all the VT slots at powerup. VT unequipped has a valid pointer and all-zero payload. The unused values of 11101—11110 will cause AIS-V to be inserted for that VT slot. |
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