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TMPR28051 Datasheet(PDF) 55 Page - Agere Systems |
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TMPR28051 Datasheet(HTML) 55 Page - Agere Systems |
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55 / 90 page ![]() Data Sheet August 1999 TMPR28051 STS-1/AU-3 (STM-0) Mapper 41 Lucent Technologies Inc. Microprocessor Interface Description (continued) Register Architecture Description (continued) Table 15. Registers 0x00—0x16: Device-Level Control, Alarm, and Mask Bits (continued) Address (Hex) Bit # Name Function Reset Default (Hex) 0x05 — — The bits in register 0x05 are used to report problems at the receive DS1/E1 and VT level. The bits in this register are composite bits. The bits that report the problems at the VT level are located in 28 separate registers (one for each VT) as described below. These composite bits are placed in the register map to determine which type of error was detected. When any one of the 28 VT bits indicates an error, the corresponding composite bit indicates an error. 0x00 7 ESOFCOM ESOFCOM = 1 reports that the device has experienced either a receive or a transmit elastic store overflow. This is an event bit and is held until read. 6 VTSIZECOM VTSIZECOM = 1 reports incorrect VT size bits. The valid VT size bits are 11 for VT1.5 and 10 for VT2. 5 VTLOPCOM VTLOPCOM = 1 reports LOP-V. 4 VTRFIRDICOM VTRFIRDICOM = 1 reports the fact that the VT RFI/RDI bits have been received as a new consistent value for three consecutive superframes. This is an event bit and is held until read. 3 VTAISCOM VTAISCOM = 1 reports the fact that the V1 and V2 pointer bytes are all 1s for three consecutive superframes. 2 VTLABCOM VTLABCOM = 1 reports change of state of the VT label. In order for this bit to be set, the device must detect three consecutive consistent new values for the VT label. This is an event bit and is held until read. 1 AISLOCCOM AISLOCCOM = 1 reports an AIS or LOC condition on DS1/ E1. This is a current state bit with a minimum persistence of 2 ms. The indications reset if the condition is no longer true. 0 STS1LOS STS1LOS = 1 reports an STS-1 loss of signal. The bits in register 0x91 are used to set the number of 6.48 MHz clock periods required to declare received STS-1 loss of signal. If this value is 0x00, then STS1LOS is not declared. This is a current state bit with a minimum persistence of 250 µs. The indications reset if the condition is no longer true. |
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