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TMPR28051 Datasheet(PDF) 67 Page - Agere Systems |
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TMPR28051 Datasheet(HTML) 67 Page - Agere Systems |
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67 / 90 page ![]() Data Sheet August 1999 TMPR28051 STS-1/AU-3 (STM-0) Mapper 53 Lucent Technologies Inc. Microprocessor Interface Description (continued) Register Architecture Description (continued) Table 23. Registers 0x88—0x89: Signal Override Control Address (Hex) Bit # Name Function Reset Default (Hex) 0x88 — — The bits in register 0x88 are used to override the DS1_E1N signal pin. These bits represent the seven VT Groups and can be individually programmed as follows. 0x00 7 TVTG-7 If TVTG-1 . . . 7 = 1, the signal will be DS1; otherwise, the signal will be E1. 6TVTG-6 5TVTG-5 4TVTG-4 3TVTG-3 2TVTG-2 1TVTG-1 0 TOVERRIDE If TOVERRIDE = 1, then the type of signal in each VT Group is determined by the 7 TVTG bits. 0x89 — — The bits in register 0x89 are used to override the DS1_E1N signal pin. These bits represent the seven VT Groups and can be individually programmed as follows. 0x00 7 RVTG-7 If RVTG-1 . . . 7 = 1, the signal will be DS1; otherwise, the signal will be E1. 6RVTG-6 5RVTG-5 4RVTG-4 3RVTG-3 2RVTG-2 1RVTG-1 0 ROVERRIDE If ROVERRIDE = 1, then the type of signal in each VT Group is determined by the 7 RVTG bits. |
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