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TMPR28051 Datasheet(PDF) 66 Page - Agere Systems |
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TMPR28051 Datasheet(HTML) 66 Page - Agere Systems |
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66 / 90 page ![]() Data Sheet TMPR28051 STS-1/AU-3 (STM-0) Mapper August 1999 52 Lucent Technologies Inc. Microprocessor Interface Description (continued) Register Architecture Description (continued) Rx VT Drop Monitoring (0x6B—0x86) Table 22. Registers 0x6B—0x86: Rx VT Drop Monitoring Address (Hex) Bit # Name Function Reset Default (Hex) 0x6B—0x86 — — The bits in register 0x6B—0x86 are used to report the VT slot status. Value is 0. 7VTSIZEER[1:28] The VTSIZEER[1:28] bits report incorrect VT size bits when the value is 1. M = 1 reports an AIS or LOC condition on DS1/E1. These are current state bits with a minimum persistence of 500 µs. The indications reset if the condition is no longer true. 6VTLOP[1:28] The VTLOP[1:28] bits report VT loss of pointer when the value is 1. These are current state bits with a minimum per- sistence of 500 µs. The indications reset if the condition is no longer true. 5 VTRDI1_[1:28] The VTRDI[1:0]_[1:28] bits report VT RDI. These are cur- rent state bits with a minimum persistence of 500 µs. The indications reset if the condition is no longer true. 4 VTRDI0_[1:28] 3VTAIS[1:28] Each VTAIS[1:28] bit = 1 reports that the V1 and V2 pointer bytes are all 1s for three consecutive superframes. These are current state bits with a minimum persistence of 1500 µs. The indications reset if the condition is no longer true. 2 VTLAB2_[1:28] The VTLAB[2:0]_[1:28] bits report the received VT labels. These bits have a minimum persistence of 500 µs. 1 VTLAB1_[1:28] 0 VTLAB0_[1:28] 0x87 7—0 — Reserved. 0x00 |
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