TMPR28051 datasheet(26/90 Pages) AGERE

26 / 90 page

Data Sheet

TMPR28051 STS-1/AU-3 (STM-0) Mapper

August 1999

Lucent Technologies Inc.

DS1/E1 to STS-1 Block Descriptions

(continued)

VT Generate (continued)

In addition to generating the superframe, this block

automatically generates the BIP-2 signal. Each VT can

be configured to intentionally insert continuous BIP-2

errors for troubleshooting purposes (BIP2ERINS[1:28]

= 1 in bit 7 of registers 0x4F—0x6A). This BIP error

insert field forces errors on both BIP-2 bits.

The resultant VT1.5 and VT2 superframes are shown

in Table 4 and Table 5,

Where:

Byte[24/32:1] = information bit

O = overhead bit

R = fixed stuff bit

V1, V2, V3 = pointer and pointer action bytes

S1, S2 = stuff opportunity bits

V4 = reserved

C1, C2 = stuff indication bits

V5 = VT overhead byte

J2, Z6/N2, Z7/K4 = unused

Table 4. VT1.5 Superframe

Table 5. VT2 Superframe

RRRRRRIR

Byte 1

Byte 24

C1C2OOOOIR

Byte 1

VT1.5

Byte 24

Superframe

Z6/N2

C1C2OOOOIR

Byte 1

Byte 24

Z7/K4

C1C2RRRS1S2R

Byte 1

Byte 24

RRRRRRRR

Byte 1

Byte 32

RRRRRRRR

C1C2OOOORR

Byte 1

Byte 32

RRRRRRRR

VT2

Superframe

Z6/N2

C1C2OOOORR

Byte 1

Byte 32

RRRRRRRR

Z7/K4

C1C2RRRRRS1

S2 Byte 1[6:0]

Byte 32

RRRRRRRR

TMPR28051 Datasheet(PDF) 26 Page - Agere Systems

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