PS081 datasheet(114/155 Pages) AMSCO

114 / 155 page

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6-11

PSØ81

clear

Clear register

Syntax:

clear p1

Parameters:

p1 = ACCU [x,y,z,r]

Calculus:

p1 := 0

Flags affected:

S Z

Bytes:

Cycles:

Description:

Clear addressed register to 0

Category:

RAM access

clk10khz

Clock source 10 kHz

Syntax:

clk10khz p1

Parameters:

p1 = number 0 or 1

Calculus:

Flags affected:

Bytes:

Cycles:

Description:

Change clock source of processor to 10 kHz. The clock of the processor is switched

to the slower 10 kHz clock instead of the 40 MHz. The 10 kHz clock is still stable to

variations in temperature and supply voltage. If p1 is set to 1 the 10 kHz clock is on,

if p1 == 0 the 10 kHz clock is off.

Category:

Miscellaneous

clrC

Clear flags

Syntax:

clrC

Parameters:

Calculus:

Flags affected:

C O

Bytes:

Cycles:

Description:

Clear Carry and Overflow flags

Category:

Shift and Rotate

clrLCD

Clear LCD

Syntax:

clrLCD

Parameters:

Calculus:

Flags affected:

Bytes:

Cycles:

Subroutine call

Description:

Clear LCD registers 61 & 62. Use this opcode in combination with ‚newlcd‘ to switch

off all LCD segments.

In real a subroutine in the ROM code is called. The assembler converts this com-

mand to the corresponding jump command.

Category:

LCD Display

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