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WM5102 Datasheet(PDF) 241 Page - Wolfson Microelectronics plc

Part # WM5102
Description  Audio Hub CODEC with Voice Processor DSP
PDF  334 Pages
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Manufacturer  WOLFSON [Wolfson Microelectronics plc]
Direct Link  http://www.wolfsonmicro.com
Logo WOLFSON - Wolfson Microelectronics plc

WM5102 Datasheet(HTML) 241 Page - Wolfson Microelectronics plc

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Production Data
WM5102
w
PD, June 2014, Rev 4.2
241
In Fractional Mode (FLLn_THETA > 0), the register fields FLLn_THETA and FLLn_LAMBDA can be
calculated as described below.
Note that an equivalent procedure is also used to derive the FLLn_SYNC_THETA and
FLLn_SYNC_LAMBDA register values from the corresponding synchroniser parameters.
Calculate GCD(FLL) using the ‘Greatest Common Denominator’ function:
GCD(FLL) = GCD(FLLn_FRATIO x FREF, FVCO)
where GCD(x, y) is the greatest common denominator of x and y
FREF is the input frequency, after division by FLLn_REFCLK_DIV, where applicable.
Next, calculate FLLn_THETA and FLLn_LAMBDA using the following equations:
FLLn_THETA = (FVCO - (FLL_N x FLLn_FRATIO x FREF)) / GCD(FLL)
FLLn_LAMBDA = (FLLn_FRATIO x FREF) / GCD(FLL)
Note that, in Fractional Mode, the values of FLLn_THETA and FLLn_LAMBDA must be co-prime (ie.
not divisible by any common integer). The calculation above ensures that the values will be co-prime.
The value of K must be a fraction less than 1 (ie. FLLn_THETA must be less than FLLn_LAMBDA).
The FLL control registers are described in Table 104 and Table 105. Example settings for a variety of
reference frequencies and output frequencies are shown in Table 108.
REGISTER
ADDRESS
BIT
LABEL
DEFAULT
DESCRIPTION
R369
(0171h)
FLL1
Control 1
0
FLL1_ENA
0
FLL1 Enable
0 = Disabled
1 = Enabled
This should be set as the final step of the
FLL1 enable sequence, ie. after the other
FLL registers have been configured.
R370
(0172h)
FLL1
Control 2
15
FLL1_CTRL_UP
D
0
FLL1 Control Update
Write ‘1’ to apply the FLL1_N and
FLL1_THETA register settings.
(Only valid when FLL1_ENA=1)
9:0
FLL1_N [9:0]
008h
FLL1 Integer multiply for FREF
(LSB = 1)
If updated while the FLL is enabled, the
new value is only effective when a ‘1’ is
written to FLL1_CTRL_UPD.
R371
(0173h)
FLL1
Control 3
15:0
FLL1_THETA
[15:0]
0018h
FLL1 Fractional multiply for FREF
This field sets the numerator (multiply)
part of the FLL1_THETA / FLL1_LAMBDA
ratio.
Coded as LSB = 1.
If updated while the FLL is enabled, the
new value is only effective when a ‘1’ is
written to FLL1_CTRL_UPD.
R372
(0174h)
FLL1
Control 4
15:0
FLL1_LAMBDA
[15:0]
007Dh
FLL1 Fractional multiply for FREF
This field sets the denominator (dividing)
part of the FLL1_THETA / FLL1_LAMBDA
ratio.
Coded as LSB = 1.



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